Abstract: An active poly-phase filter has a converting section and a filtering section having two first input terminals, two second input terminals and four output terminals. The converting section has first, second, fourth and fifth transistors forming a translinear circuit and a third transistor forming a current mirror circuit with the second transistor. The converting section converts unbalanced high-frequency power into a difference input between a collector current of the third transistor and a collector current of the first transistor having phase difference of ? radians. The filtering section receives one collector current at the first input terminals and receives another collector current at the second input terminals and outputs a first difference output between outputs of two output terminals and a second difference output between outputs of other two output terminals such that the difference outputs has a phase difference of ?/2 radians.

Abstract: The digital signal processor is for correcting a DC output at an output terminal of an internal circuit of an analog circuit device. The digital signal processor includes a digital register for storing a digital value, a D/A converter for converting the digital value stored in the digital register into an analog voltage and applying the converted analog voltage to the output terminal as the DC output, a polarity determining circuit which outputs a first signal when an analog DC voltage at a reference correction point different from the output terminal in the internal circuit is higher than a predetermined threshold value and otherwise outputs a second signal, and an updating function configured to monotonously increase or decrease the digital value stored in the digital register while a predetermined one of the first and second signals is outputted from the polarity determining circuit.

Abstract: An active poly-phase filter has a converting section and a filtering section having two first input terminals, two second input terminals and four output terminals. The converting section has first, second, fourth and fifth transistors forming a translinear circuit and a third transistor forming a current mirror circuit with the second transistor. The converting section converts unbalanced high-frequency power into a difference input between a collector current of the third transistor and a collector current of the first transistor having phase difference of ? radians. The filtering section receives one collector current at the first input terminals and receives another collector current at the second input terminals and outputs a first difference output between outputs of two output terminals and a second difference output between outputs of other two output terminals such that the difference outputs has a phase difference of ?/2 radians.

Abstract: A microstrip line includes a signal strip conductor and a ground conductor. A coplanar line includes two regions. A first region includes a signal strip conductor which is connected to the signal strip conductor of the microstrip line via a wire or the like and a ground strip conductor which continues to the ground conductor. A second region is formed with a ground strip conductor formed above the ground strip conductor via a through hole. A transmission mode changes itself in the microstrip line, the first region of the coplanar line, and the second region of the coplanar line in the sequence as described. This enables converting the transmission mode efficiently from the microstrip line to the coplanar line.

Abstract: The digital signal processor is for correcting a DC output at an output terminal of an internal circuit of an analog circuit device. The digital signal processor includes a digital register for storing a digital value, a D/A converter for converting the digital value stored in the digital register into an analog voltage and applying the converted analog voltage to the output terminal as the DC output, a polarity determining circuit which outputs a first signal when an analog DC voltage at a reference correction point different from the output terminal in the internal circuit is higher than a predetermined threshold value and otherwise outputs a second signal, and an updating function configured to monotonously increase or decrease the digital value stored in the digital register while a predetermined one of the first and second signals is outputted from the polarity determining circuit.

Abstract: With a capacitor C inserted in an interstage portion of multiple stages of amplifier circuits, a high pass filter is generated by the capacitor C and an input impedance |Z| of an amplifier circuit in the next stage. Accordingly, frequency components lower than a cutoff frequency fc are cut off, and therefore are not transferred to the subsequent stage. However, radio frequency components higher than or equal to a fundamental wave component determined by an envelope of a radio frequency signal intermittently transmitted can be transferred. Consequently, transfer of DC offset potentials can be cut off, and noise, such as flicker noise, having great power in a DC or near-DC zone can be effectively cut off. Thereby, the S/N ratio, detection sensitivity, and detection accuracy can be improved.

Abstract: A semiconductor chip mounting board comprises an insulating substrate and a plurality of input or output ports to be connected to a semiconductor chip for processing a high-frequency signal. The semiconductor chip has on top thereof a chip ground layer structured by a metal layer. The insulating substrate comprises a strip line formed on top thereof and to be connected to the ports, and a cavity, or a recessed space, for embedding the semiconductor chip therein. The substrate further comprises a common ground made of metal and exposed to the bottom face of the cavity, a coplanar line connected to the strip line, triple parallel bonding wires connecting the connecting terminals of the chip and the coplanar line, and embedded conductors embedded at least in portions of an annular groove or annular gap defined between the inner wall surface of the cavity and the side faces of the chip.

Abstract: A microstrip line includes a signal strip conductor and a ground conductor. A coplanar line includes two regions. A first region includes a signal strip conductor which is connected to the signal strip conductor of the microstrip line via a wire or the like and a ground strip conductor which continues to the ground conductor. A second region is formed with a ground strip conductor formed above the ground strip conductor via a through hole. A transmission mode changes itself in the microstrip line, the first region of the coplanar line, and the second region of the coplanar line in the sequence as described. This enables converting the transmission mode efficiently from the microstrip line to the coplanar line.

Abstract: Two lines Ai1 (i=1 or 2) are connected to an input terminal In. The line Ai1 is grounded via a capacitor Ci1. The line Ai1 and a line Bi1 form a coupled line. One end of the line Bi1 is connected to a positive pole of a diode Di1 which is grounded at its negative pole. Lines Bi0 and Bi2 are connected to the other end of the line Bi1. The other end of the line Bi0 is connected to a capacitor Ci0 which is grounded at its other end and a resistor Ri0 which is connected to a voltage control terminal VCTLi at its other end. The other end of the line Bi2 is connected to the positive pole of a diode Di2. The line Bi2 and the line Ai2 form a coupled line. One end of the line Ai2 is connected to an output terminal Out-i, and the other end is grounded via a capacitor Ci2. The output of the terminals Out-1, 2 are switched to 5.8 GHz band, 4.8 GHz band and cut-off, by applying to VCTL1 and VCTL2 three potentials, that is, ground potential.

Abstract: A start signal outputting circuit according to the invention has a differential RF/DC convertor part 100 for converting a high frequency power (RF) into a d.c. potential (DC). The RF/DC convertor part 100 is formed by two transistors QRD, QDD working as a diode, and transistors QR1˜R3, QD1˜D3 and resistances RR1˜R3 for forming high resistances at anode sides and cathode sides of these diodes, respectively. A differential amplification part 200 disposed at a later stage of the diode has not only amplifying effect but also low-pass filtering effect together with filtering pars 120, 210 of its previous and later stages. In this case, it is designed so that current flowing through the respective circuits is about 2˜3 ?A. As a result, even if the high frequency power of the specified frequency is weak, for example ?60˜?40 dBm, a start signal outputting circuit 1000 which outputs a d.c. potential of 0.3˜2.4V, is suitable for integration and has a low power consumption can be obtained.

Abstract: A start signal output circuit having an RF/DC conversion circuit to which radio frequency power (RF) of specified frequency is inputted and from which a direct current potential (DC) is outputted, comprises a detection/amplification circuit 210 which includes a voltage doubler wave-detector circuit 10 configured including a sensing diode Q1 (Tr34) for sensing the RF power, a differential amplifier including differential pair transistors Tr31 and Tr32, and a current mirror circuit. A base current of one Tr31 of the differential pair transistors is brought into substantial agreement with a DC component of a current flowing through the sensing diode Q1 (Tr34). A total of currents flowing through the differential pair transistors Tr31 and Tr32 is regulated to a substantially constant value by the current mirror circuit. Thus, the start signal output circuit which is small in size, high in sensitivity and low in power consumption can be realized.

Abstract: With a capacitor C inserted in an interstage portion of multiple stages of amplifier circuits, a high pass filter is generated by the capacitor C and an input impedance |Z| of an amplifier circuit in the next stage. Accordingly, frequency components lower than a cutoff frequency fc are cut off, and therefore are not transferred to the subsequent stage. However, radio frequency components higher than or equal to a fundamental wave component determined by an envelope of a radio frequency signal intermittently transmitted can be transferred. Consequently, transfer of DC offset potentials can be cut off, and noise, such as flicker noise, having great power in a DC or near-DC zone can be effectively cut off. Thereby, the S/N ratio, detection sensitivity, and detection accuracy can be improved.

Abstract: Two lines Ai1 (i=1 or 2) are connected to an input terminal In. The line Ai1 is grounded via a capacitor Ci1. The line Ai1 and a line Bi1 form a coupled line. One end of the line Bi1 is connected to a positive pole of a diode Di1 which is grounded at its negative pole. Lines Bi0 and Bi2 are connected to the other end of the line Bi1. The other end of the line Bi0 is connected to a capacitor Ci0 which is grounded at its other end and a resistor Ri0 which is connected to a voltage control terminal VCTLi at its other end. The other end of the line Bi2 is connected to the positive pole of a diode Di2. The line Bi2 and the line Ai2 form a coupled line. One end of the line Ai2 is connected to an output terminal Out-i, and the other end is grounded via a capacitor Ci2. The output of the terminals Out-1, 2 are switched to 5.8 GHz band, 4.8 GHz band and cut-off, by applying to VCTL1 and VCTL2 three potentials, that is, ground potential.

Abstract: A start signal outputting circuit according to the invention has a differential RF/DC convertor part 100 for converting a high frequency power (RF) into a d.c. potential (DC). The RF/DC convertor part 100 is formed by two transistors QRD,QDD working as a diode, and transistors QR1˜R3,QD1˜D3 and resistances RR1˜R3 for forming high resistances at anode sides andcathodesidesofthesediodes, respectively. Adifferential amplification part 200 disposed at a later stage of the diode has not only amplifying effect but also low-pass filtering effect together with filtering pars 120, 210 of its previous and later stages. In this case, it is designed so that current flowing through the respective circuits is about 2˜3 ?A. As a result, even if the high frequency power of the specified frequency is weak, for example ?60˜?40 dBm, a start signal outputting circuit 1000 which outputs a d.c. potential of 0.3˜2.4V, is suitable for integration and has a low power consumption can be obtained.

Abstract: A receiver configured to receive a plurality of signals k (k=1, 2, . . . , M) allocated in a first frequency band. The receiver includes a frequency conversion section for reallocating the signals k in a second frequency band for sampling by a single AD converter at a sampling frequency fs such that digital data of the sampled signals k are obtained in a third frequency band extending from zero Hz to a frequency represented by fs/2; and a signal extraction section for extracting a target base band signal k from the digital data obtained by the AD conversion section. The frequency conversion section performs the reallocation in such a manner that at least a frequency represented by Jfs/2 (J is an integer) is located between the frequencies of at least two of the signals k and that the sampled signals do not overlap.

Abstract: A start signal output circuit having an RF/DC conversion circuit to which radio frequency power (RF) of specified frequency is inputted and from which a direct current potential (DC) is outputted, comprises a detection/amplification circuit 210 which includes a voltage doubler wave-detector circuit 10 configured including a sensing diode Q1 (Tr34) for sensing the RF power, a differential amplifier including differential pair transistors Tr31 and Tr32, and a current mirror circuit. A base current of one Tr31 of the differential pair transistors is brought into substantial agreement with a DC component of a current flowing through the sensing diode Q1 (Tr34). A total of currents flowing through the differential pair transistors Tr31 and Tr32 is regulated to a substantially constant value by the current mirror circuit. Thus, the start signal output circuit which is small in size, high in sensitivity and low in power consumption can be realized.

Abstract: A receiver apparatus receives substantially concurrently a plurality of signals k (k=1, 2, . . . , M) that have been transmitted while being allocated in a broad, first frequency band. The receiver apparatus includes a frequency conversion section for reallocating the signals k in a second frequency band within which the signals k can be sampled by a single AD converter; an AD conversion section for sampling the signals k having being reallocated into the second frequency band at a sampling frequency fs such that digital data of the sampled signals k are obtained in a third frequency band extending from zero Hz to a frequency represented by fs/2; and a signal extraction section for extracting a target base band signal k from the digital data obtained through the sampling by the AD conversion section.

Abstract: In a distributed constant circuit, a first line is connected between a first node and a second node. The first node is grounded through a series connection between a first capacitor and a second line, and the second node is grounded through a series connection between a second capacitor and a third line. The parameters of the first, second and third lines and the first and second capacitors satisfy a predetermined relational expression such that characteristics equivalent to a &lgr;/4 line are obtained with respect to the frequency of a fundamental wave, and the second and third lines and the first and second capacitors respectively resonate with respect to an arbitrary frequency.

Abstract: A switching circuit device including a multi-gate field effect transistor having a plurality of gate electrodes between a drain electrode and a source electrode, a low resistor having its one end connected between the gate electrodes, and a high resistor connected between the other end of the low resistor and any one of the drain electrode, the source electrode and the end of the other low resistor.

Abstract: In a distributed constant circuit, a first line is connected between a first node and a second node. The first node is grounded through a series connection between a first capacitor and a second line, and the second node is grounded through a series connection between a second capacitor and a third line. The parameters of the first, second and third lines and the first and second capacitors satisfy a predetermined relational expression such that characteristics equivalent to a .lambda./4 line are obtained with respect to the frequency of a fundamental wave, and the second and third lines and the first and second capacitors respectively resonate with respect to an arbitrary frequency.