Patents by Inventor Hisao Morooka

Hisao Morooka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7425141
    Abstract: An enclosure of an electronic apparatus includes an upper panel covering over the upper surface of an inner space of the enclosure. A connector is incorporated in the enclosure. The electronic apparatus allows the upper panel to define the peripheral edge retreating from the tip end of the connector. When the user of electronic apparatus looks down at the upper panel, the user can see the tip end of the connector. The user is in this manner allowed to locate the connector without looking into the side of the enclosure. The user can thus insert a plug or male connector into a connector or female connector with a higher reliability. A cover member may be used to cover over the tip end of the connector.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: September 16, 2008
    Assignee: Fujitsu Limited
    Inventors: Masaki Kanayama, Mitsuhiko Kawami, Hisao Morooka, Yusuke Mizuno, Sonomasa Kobayashi, Katsuichi Goto
  • Patent number: 7354857
    Abstract: A solar cell comprises a substrate, and a metal electrode layer, a p-i-n junction, and a transparent electrode layer which are successively laminated on the substrate. The p-i-n junction comprises an n layer, an i layer, and a p layer which are laminated in this order. The i layer is made of an amorphous iron silicide film containing hydrogen in accordance with the present invention, and is formed on the n layer by supplying an iron vapor into a plasma of a material gas in which a silane type gas and a hydrogen gas are mixed. In the i layer, dangling bonds of silicon atoms and/or iron atoms are terminated with hydrogen, whereby a number of trap levels which may occur in the amorphous iron silicide film are eliminated.
    Type: Grant
    Filed: August 19, 2005
    Date of Patent: April 8, 2008
    Assignees: TDK Corporation, Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisao Morooka, Hiroshi Yamada, Kazuo Nishi
  • Patent number: 7352044
    Abstract: A solar battery 10 comprises a metal electrode layer 12, a pin junction 100, and a transparent electrode layer 16 which are successively laminated on a substrate 11 such as a silicon substrate. The pin junction 100 comprises an n-layer 13, an i-layer 14, and a p-layer 15 which are laminated in succession. The i-layer 14 is formed by amorphous iron silicide (FexSiy:H) containing hydrogen atoms. In the i-layer 14, at least a part of the hydrogen atoms contained therein terminate dangling bonds of silicon atoms and/or iron atoms, so that a number of trap levels which may occur in an amorphous iron silicide film can be eliminated, whereby the i-layer 14 exhibits a characteristic as an intrinsic semiconductor layer.
    Type: Grant
    Filed: January 16, 2004
    Date of Patent: April 1, 2008
    Assignees: TDK Corporation, Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroshi Yamada, Hisao Morooka, Kazuo Nishi
  • Publication number: 20080024436
    Abstract: The information processing apparatus of the invention includes: a display section having a display screen on one surface thereof; a main unit that supports the display section so that the display section can open and close with the one surface arranged inside, and, when opened, serves as a base to erect the display section; and an input section that is physically detachably coupled to the main unit so as to be flush with the main unit. The input section has operating members for inputting information arrayed on a top surface thereof. The length of the sum of the input section and the main unit in a direction of the depth thereof when coupled is substantially same as the length of the display section in the same direction when closed.
    Type: Application
    Filed: November 16, 2006
    Publication date: January 31, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Hisao Morooka
  • Publication number: 20080024437
    Abstract: The information processing apparatus of the invention includes: a display section having a display screen on one surface thereof; a main unit that supports the display section so that the display section can be opened and closed with the one surface arranged inside, and, when opened, serves as a base to erect the display section; and an input section that is integrated with the main unit to be flush with the main unit with an operating member arrayed on the top thereof. A back surface on the back of the display screen is configured to be shaped like a tray with raised ridges formed on the periphery of the back surface.
    Type: Application
    Filed: November 16, 2006
    Publication date: January 31, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Hisao Morooka
  • Publication number: 20070184727
    Abstract: A housing accommodates a circuit board and an electronic component electrically connected to the circuit board, and is used for an electronic apparatus that includes the circuit board and the electronic component. The housing includes a cover that is made by extrusion molding of metal.
    Type: Application
    Filed: February 16, 2007
    Publication date: August 9, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Masaki Kanayama, Mitsuhiko Kawami, Hisao Morooka
  • Publication number: 20070139396
    Abstract: An electronic apparatus includes a body, and a display that displays information and is foldable over the body, a pointing device that designates an input position and coordinate on the display, and a lock mechanism that locks the display that has been folded over the body, part of the lock mechanism being formed in the pointing device.
    Type: Application
    Filed: February 16, 2007
    Publication date: June 21, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Masaki Kanayama, Mitsuhiko Kawami, Hisao Morooka
  • Publication number: 20070076397
    Abstract: An enclosure of an electronic apparatus includes an upper panel covering over the upper surface of an inner space of the enclosure. A connector is incorporated in the enclosure. The electronic apparatus allows the upper panel to define the peripheral edge retreating from the tip end of the connector. When the user of electronic apparatus looks down at the upper panel, the user can see the tip end of the connector. The user is in this manner allowed to locate the connector without looking into the side of the enclosure. The user can thus insert a plug or male connector into a connector or female connector with a higher reliability.
    Type: Application
    Filed: November 9, 2006
    Publication date: April 5, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Masaki Kanayama, Mitsuhiko Kawami, Hisao Morooka, Yusuke Mizuno, Sonomasa Kobayashi, Katsuichi Goto
  • Publication number: 20060219293
    Abstract: The present invention provides a solar cell whose external color can be adjusted so that redness is suppressed. In the case where a photoelectric conversion layer contains amorphous silicon, an optical absorption layer is provided between the photoelectric conversion layer and a reflecting electrode layer. The optical absorption layer has a light absorbing property mainly in a long wavelength range, while the photoelectric conversion layer (amorphous silicon) has a selective light absorbing property mainly in a short/medium wavelength range. Incident light (solar light) passed through the photoelectric conversion layer further passes through the optical absorption layer and, after that, is reflected by the reflecting electrode layer. That is, remaining light of the incident light absorbed by the optical absorption layer and the photoelectric conversion layer is reflected by the reflecting electrode layer.
    Type: Application
    Filed: February 28, 2006
    Publication date: October 5, 2006
    Applicants: TDK CORPORATION, SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hisao Morooka, Takeshi Echizenya, Hirokazu Fujioka, Saki Takahashi, Kazuo Nishi
  • Publication number: 20060049478
    Abstract: A solar battery 10 comprises a metal electrode layer 12, a pin junction 100, and a transparent electrode layer 16 which are successively laminated on a substrate 11 such as a silicon substrate. The pin junction 100 comprises an n-layer 13, an i-layer 14, and a p-layer 15 which are laminated in succession. The i-layer 14 is formed by amorphous iron silicide (FexSiy:H) containing hydrogen atoms. In the i-layer 14, at least a part of the hydrogen atoms contained therein terminate dangling bonds of silicon atoms and/or iron atoms, so that a number of trap levels which may occur in an amorphous iron silicide film can be eliminated, whereby the i-layer 14 exhibits a characteristic as an intrinsic semiconductor layer.
    Type: Application
    Filed: January 16, 2004
    Publication date: March 9, 2006
    Inventors: Hiroshi Yamada, Hisao Morooka, Kazuo Nishi
  • Publication number: 20060003585
    Abstract: A solar cell comprises a substrate, and a metal electrode layer, a p-i-n junction, and a transparent electrode layer which are successively laminated on the substrate. The p-i-n junction comprises an n layer, an i layer, and a p layer which are laminated in this order. The i layer is made of an amorphous iron silicide film containing hydrogen in accordance with the present invention, and is formed on the n layer by supplying an iron vapor into a plasma of a material gas in which a silane type gas and a hydrogen gas are mixed. In the i layer, dangling bonds of silicon atoms and/or iron atoms are terminated with hydrogen, whereby a number of trap levels which may occur in the amorphous iron silicide film are eliminated.
    Type: Application
    Filed: August 19, 2005
    Publication date: January 5, 2006
    Applicants: TDK Corporation, Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisao Morooka, Hiroshi Yamada, Kazuo Nishi
  • Patent number: 6960718
    Abstract: In a photovoltaic element according to the present invention, a first transparent conductive film, a second transparent conductive film, a p-type semiconductor film, an intrinsic semiconductor layer, a n-type semiconductor layer and a backside electrode are stacked in turn on a transparent substrate. Then, an intermediate layer is provided between the second transparent conductive film and the p-type semiconductor layer so as to cover the first transparent conductive film and the second transparent conductive film.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: November 1, 2005
    Assignees: TDK Corporation, Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuji Sano, Hisao Morooka, Kazuo Nishi
  • Publication number: 20050210666
    Abstract: The present invention provides a substrate holding method capable of contributing to improvement in performance of an electronic part. A plastic film is adhered to a holding frame by using an adhesive tape having a proper gas releasing characteristic such that total quantity of gas detected when analysis using gas chromatograph mass spectrometry (dynamic HS-GC-MS) is conducted under test conditions of 180° C. and 10 minutes is 100.5 ?g/g or less in n-tetradecane. In the case where the plastic film held by the holding frame is subjected to a process of manufacturing an electronic part (for example, a solar battery), even when a process accompanying generation of heat during the manufacturing process (for example, a film forming process such as plasma CVD) is performed on the plastic film, a release amount of unnecessary gas released from the adhesive tape due to the influence of the heat is suppressed, so that deterioration in the performance of the electronic part caused by the unnecessary gas is suppressed.
    Type: Application
    Filed: March 7, 2005
    Publication date: September 29, 2005
    Applicants: TDK CORPORATION, SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hisao Morooka, Hideaki Ninomiya, Junichi Shimamura, Kazuo Nishi
  • Patent number: 6949463
    Abstract: A solar cell comprises a substrate, and a metal electrode layer, a p-i-n junction, and a transparent electrode layer which are successively laminated on the substrate. The p-i-n junction comprises an n layer, an i layer, and a p layer which are laminated in this order. The i layer is made of an amorphous iron silicide film containing hydrogen in accordance with the present invention, and is formed on the n layer by supplying an iron vapor into a plasma of a material gas in which a silane type gas and a hydrogen gas are mixed. In the i layer, dangling bonds of silicon atoms and/or iron atoms are terminated with hydrogen, whereby a number of trap levels which may occur in the amorphous iron silicide film are eliminated.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: September 27, 2005
    Assignees: TDK Corporation, Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisao Morooka, Hiroshi Yamada, Kazuo Nishi
  • Publication number: 20050087225
    Abstract: On a substrate 1 is formed a first transparent electrode layer 3, on which a p-type semiconductor film 5, an i-type semiconductor film 6 and an n-type semiconductor film 7 are successively formed to constitute an electric power generating layer. On the n-type semiconductor film 7 is formed a second transparent electrode layer 8, on which a back electrode layer 9 is formed. Moreover, an intermediate layer 4 made of a given material is formed between the first transparent electrode layer 3 and the p-type semiconductor film 5 to complete a photovoltaic element 40 with high electric power generating efficiency (conversion efficiency).
    Type: Application
    Filed: January 10, 2003
    Publication date: April 28, 2005
    Applicants: TDK Corporation, Semiconductor Energy Laboratory
    Inventors: Hisao Morooka, Kazuo Nishi
  • Patent number: 6815259
    Abstract: A frame-shaped holding frame which has a small thermal expansion coefficient is used. When a complex member in which a metal material is impregnated in a ceramic material, which has a smaller thermal expansion coefficient than 10 ppm/° C., is used, a warp and a wrinkle are greatly decreased. In particular, in the case of a material with a thermal expansion coefficient of 6.5 ppm/° C. or smaller, the warp and the wrinkle are not caused. When the flexible substrate is adhered to the holding frame by an adhesive, an adhesion area may be obtained so that a sufficient strength is kept. Also, since the flexible substrate is adhered onto the upper surface of the holding frame, the thickness of the holding frame is independent on fixing of the substrate. The thickness may be set so that a mechanical strength is kept and the substrate is smoothly transferred.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: November 9, 2004
    Assignees: Semiconductor Energy Laboratory Co., Ltd., TDK Corporation
    Inventors: Hideaki Ninomiya, Hisao Morooka, Yoshihito Yamamoto, Kazuo Nishi
  • Publication number: 20040203220
    Abstract: A solar cell comprises a substrate, and a metal electrode layer, a p-i-n junction, and a transparent electrode layer which are successively laminated on the substrate. The p-i-n junction comprises an n layer, an i layer, and a p layer which are laminated in this order. The i layer is made of an amorphous iron silicide film containing hydrogen in accordance with the present invention, and is formed on the n layer by supplying an iron vapor into a plasma of a material gas in which a silane type gas and a hydrogen gas are mixed. In the i layer, dangling bonds of silicon atoms and/or iron atoms are terminated with hydrogen, whereby a number of trap levels which may occur in the amorphous iron silicide film are eliminated.
    Type: Application
    Filed: January 14, 2004
    Publication date: October 14, 2004
    Applicants: TDK Corporation, Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisao Morooka, Hiroshi Yamada, Kazuo Nishi
  • Publication number: 20030205269
    Abstract: In a photovoltaic element according to the present invention, a first transparent conductive film, a second transparent conductive film, a p-type semiconductor film, an intrinsic semiconductor layer, a n-type semiconductor layer and a backside electrode are stacked in turn on a transparent substrate. Then, an intermediate layer is provided between the second transparent conductive film and the p-type semiconductor layer so as to cover the first transparent conductive film and the second transparent conductive film.
    Type: Application
    Filed: March 28, 2003
    Publication date: November 6, 2003
    Applicants: TDK Corporation, Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuji Sano, Hisao Morooka, Kazuo Nishi
  • Patent number: D521992
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: May 30, 2006
    Assignee: Fujitsu Limited
    Inventors: Hisao Morooka, Mitsuhiko Kawami
  • Patent number: D566113
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: April 8, 2008
    Assignee: Fujitsu Limited
    Inventors: Hisao Morooka, Tomohiro Takizawa