Patents by Inventor Hisao Tateishi

Hisao Tateishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5539590
    Abstract: A floppy disk controller enters into a standby mode to reduce electric power consumption, and includes a standby controller which causes a floppy disk driver unit to report a status change to a recovery controller during the standby mode to recover the floppy disk controller to an active mode, thereby indicating the correct status of the floppy disk driver unit at all times.
    Type: Grant
    Filed: September 15, 1994
    Date of Patent: July 23, 1996
    Assignee: NEC Corporation
    Inventor: Hisao Tateishi
  • Patent number: 5432647
    Abstract: A disk format controller for a disk drive operating on a first disk containing an original version of a program and an application-specific decoding rule where signals are recorded according to an application-specific encoding rule, and operating on a second disk containing a copy of the program and a copy of the decoding rule where signals are recorded according to a generally established format. Signals from an address specified by a host unit are transferred to the host unit via an interface so that the original version of the program and the decoding rule are installed in the host unit when the first disk is used and the copy of the program and the copy of the decoding rule are installed in the host unit when the second disk is used. In a copying mode of the host unit, the generally established format is used to control the disk drive to write the copy of the program and the copy of the decoding rule onto a third disk whose recording format is therefore identical to the format of the second disk.
    Type: Grant
    Filed: May 27, 1993
    Date of Patent: July 11, 1995
    Assignee: NEC Corporation
    Inventor: Hisao Tateishi
  • Patent number: 4947140
    Abstract: A voltage controlled oscillator comprises a differential circuit composed of first and second MOS transistors each having a drain connected to a gate of the other MOS transistor and each having a source connected to a constant current source, a capacitor connected to couple between the sources of the first and second MOS transistors, a first current mirror circuit having an input connected to the drain of the first MOS transistor and an output connected to the second MOS transistor, and a second current mirror circuit having an input connected to the drain of the second MOS transistor and an output connected to the first MOS transistor. A current value of the constant current sources is controlled to change an oscillation frequency.
    Type: Grant
    Filed: October 2, 1989
    Date of Patent: August 7, 1990
    Assignee: NEC Corporation
    Inventor: Hisao Tateishi
  • Patent number: 4857866
    Abstract: A phase-locked loop circuit comprises a controlled oscillator receiving a control signal for generating an oscillation signal of a frequency corresponding to the received control signal, and a frequency divider receiving the oscillation signal for generating a signal having a frequency divided by a given frequency division ratio. A phase detector receives an input signal and the frequency-divided signal. This phase detector generates a first phase difference signal starting at the input signal and terminating at one of a rising edge of the frequency-divided signal. The phase detector also generates a second phase difference signal having a constant pulse width in an interval period between each pair of adjacent first phase difference signals without substantially overlapping the first phase difference signal.
    Type: Grant
    Filed: August 17, 1988
    Date of Patent: August 15, 1989
    Assignee: NEC Corporation
    Inventor: Hisao Tateishi
  • Patent number: 4774479
    Abstract: A phase locked loop circuit using a reference signal and a response control signal with a preset transition time, comprising a voltage-controlled oscillator to produce a signal variable in phase, a detecting circuit responsive to the reference and variable-phase signals for producing a signal indicating a delay or advance in phase of the variable-phase signal with respect to the reference signal during a phase difference detect period for which the signal from the detecting circuit is indicative of a difference in phase between the reference and variable-phase signals for each period of cycle of the variable-phase signal, a voltage signal generating circuit responsive to the signal from the detecting circuit for producing a voltage signal having first and second states to advance and retard the phase of the variable-phase signal, respectively, and a third state to maintain the phase of the variable-phase signal, the signal generating circuit being responsive to this voltage signal for producing the variable-p
    Type: Grant
    Filed: March 17, 1987
    Date of Patent: September 27, 1988
    Assignee: NEC Corporation
    Inventor: Hisao Tateishi