Patents by Inventor Hisaomi Yamashita

Hisaomi Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7141471
    Abstract: A sidewall insulating film (11) made of a silicon oxide film is formed on the sidewall of a gate electrode (7) (word line) with an aim to reduce the capacitance to the word line serving as the major component of the bit line capacitance. Also, when openings for connecting the bit lines are formed above the spaces of the gate electrodes (7) (word lines) by the dry etching of a silicon oxide film (31) above contact holes (12), a silicon nitride film (19) to be an etching stopper is provided below the silicon oxide film (31) so as to reduce the amount of the bottom surface of the opening receded below the upper surface of a cap insulating film (9).
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: November 28, 2006
    Assignee: Elpida Memory, Inc.
    Inventors: Satoru Yamada, Hiroyuki Enomoto, Nobuya Saito, Tsuyoshi Kawagoe, Hisaomi Yamashita
  • Publication number: 20040076068
    Abstract: A sidewall insulating film (11) made of a silicon oxide film is formed on the sidewall of a gate electrode (7) (word line) with an aim to reduce the capacitance to the word line serving as the major component of the bit line capacitance. Also, when openings for connecting the bit lines are formed above the spaces of the gate electrodes (7) (word lines) by the dry etching of a silicon oxide film (31) above contact holes (12), a silicon nitride film (19) to be an etching stopper is provided below the silicon oxide film (31) so as to reduce the amount of the bottom surface of the opening receded below the upper surface of a cap insulating film (9). A side-wall insulating film (11) composed of a silicon oxide film is formed on the side wall of a gate electrode (7) (word line WL) to reduce pair word line capacity components as a main component of a bit line capacity.
    Type: Application
    Filed: September 5, 2003
    Publication date: April 22, 2004
    Inventors: Satoru Yamada, Hiroyuki Enomoto, Nobuya Saito, Tsuyoshi Kawagoe, Hisaomi Yamashita