Patents by Inventor Hisashi Furuya

Hisashi Furuya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10076994
    Abstract: A vehicle lamp includes a first light source configured to emit first light, a first reflective member configured to reflect the first light downward with respect to a vehicle advancing direction, a second reflective member configured to reflect some of the first light reflected by the first reflective member upward with respect to the vehicle advancing direction, a second light source disposed below the second reflective member and configured to emit second light in the vehicle advancing direction, and a projection lens configured to project the first light and the second light in the vehicle advancing direction, wherein the projection lens has a refracting surface configured to refract at least some of the second light downward than an optical axis of the second light.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: September 18, 2018
    Assignee: STANLEY ELECTRIC CO., LTD.
    Inventors: Kayuri Kinoshita, Hisashi Furuya
  • Publication number: 20170299137
    Abstract: A vehicle lamp includes a first light source configured to emit first light, a first reflective member configured to reflect the first light downward with respect to a vehicle advancing direction, a second reflective member configured to reflect some of the first light reflected by the first reflective member upward with respect to the vehicle advancing direction, a second light source disposed below the second reflective member and configured to emit second light in the vehicle advancing direction, and a projection lens configured to project the first light and the second light in the vehicle advancing direction, wherein the projection lens has a refracting surface configured to refract at least some of the second light downward than an optical axis of the second light.
    Type: Application
    Filed: April 14, 2017
    Publication date: October 19, 2017
    Inventors: Kayuri Kinoshita, Hisashi Furuya
  • Patent number: 9347636
    Abstract: A vehicle lighting unit forming low-beam and high-beam light distribution patterns can include: a light source having a substrate, and a first light-emitting section and a second light-emitting section arranged in two rows on a surface of the substrate; a first optical system configured to control light emitted from the first light-emitting section to form at least part of the low-beam light distribution pattern; a second optical system configured to control light emitted from the second light-emitting section to form at least part of the high-beam light distribution pattern; a light-shielding section disposed between the first light-emitting section and the second light-emitting section, the light-shielding section configured to shield part of the light from the first light-emitting section so as not to enter the second optical system; and a control unit configured to control to form the low-beam light distribution pattern or the high-beam light distribution pattern.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: May 24, 2016
    Assignee: STANLEY ELECTRIC CO., LTD.
    Inventors: Toshiyasu Soda, Hisashi Furuya, Shinji Yamagata, Toshihiro Oikawa
  • Publication number: 20140286033
    Abstract: A vehicle lighting unit forming low-beam and high-beam light distribution patterns can include: a light source having a substrate, and a first light-emitting section and a second light-emitting section arranged in two rows on a surface of the substrate; a first optical system configured to control light emitted from the first light-emitting section to form at least part of the low-beam light distribution pattern; a second optical system configured to control light emitted from the second light-emitting section to form at least part of the high-beam light distribution pattern; a light-shielding section disposed between the first light-emitting section and the second light-emitting section, the light-shielding section configured to shield part of the light from the first light-emitting section so as not to enter the second optical system; and a control unit configured to control to form the low-beam light distribution pattern or the high-beam light distribution pattern.
    Type: Application
    Filed: March 24, 2014
    Publication date: September 25, 2014
    Applicant: Stanley Electric Co., Ltd.
    Inventors: Toshiyasu Soda, Hisashi Furuya, Shinji Yamagata, Toshihiro Oikawa
  • Patent number: 8529695
    Abstract: Silicon wafer manufacturing method including cleaning polycrystalline silicon with dissolved ozone aqueous solution, cleaning the polycrystalline silicon with fluoric acid or mixed acid of fluoric acid and nitric acid, rinsing the polycrystalline silicon with ultra pure water, melting the rinsed polycrystalline silicon and pulling a single crystal silicon ingot from the molten silicon liquid at a solidification ratio of 0.9 or less, making the pulled single crystal silicon ingot into block-shaped or grain-shaped single crystal silicon, cleaning with dissolved ozone aqueous solution, cleaning with fluoric acid or mixed acid of fluoric acid and nitric acid, rinsing the single crystal silicon with ultra pure water, remelting and pulling a single crystal silicon ingot at a solidification of 0.9 or less, and forming a silicon wafer out of the single crystal silicon ingot.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: September 10, 2013
    Assignee: Sumco Corporation
    Inventors: Kazuhiro Harada, Hisashi Furuya
  • Publication number: 20110263126
    Abstract: Method for manufacturing a silicon wafer free of point defect agglomerates by processes including adding pure carbon to raw material of polycrystalline silicon, melting to become a molten silicon liquid, pulling a single silicon crystal ingot comprising a perfect domain [P] from the molten silicon liquid by controlling a ratio of V/G (mm2/minute ° C.), lapping a silicon wafer cut out from the ingot, beveling the silicon wafer, chemical etching the beveled wafer so as to be removed damages of a surface of the wafer, and mirror-polishing the etched wafer, and the pure carbon is added to the raw material of polycrystalline silicon so that a density of carbon in the ingot becomes 1×1015 to 5×1015 atoms/cm3.
    Type: Application
    Filed: April 29, 2011
    Publication date: October 27, 2011
    Applicant: SUMCO CORPORATION
    Inventors: Kazuhiro HARADA, Hisashi Furuya, Yukio MUROI
  • Publication number: 20110259259
    Abstract: Silicon wafer manufacturing method including cleaning polycrystalline silicon with dissolved ozone aqueous solution, cleaning the polycrystalline silicon with fluoric acid or mixed acid of fluoric acid and nitric acid, rinsing the polycrystalline silicon with ultra pure water, melting the rinsed polycrystalline silicon and pulling a single crystal silicon ingot from the molten silicon liquid at a solidification ratio of 0.9 or less, making the pulled single crystal silicon ingot into block-shaped or grain-shaped single crystal silicon, cleaning with dissolved ozone aqueous solution, cleaning with fluoric acid or mixed acid of fluoric acid and nitric acid, rinsing the single crystal silicon with ultra pure water, remelting and pulling a single crystal silicon ingot at a solidification of 0.9 or less, and forming a silicon wafer out of the single crystal silicon ingot.
    Type: Application
    Filed: April 29, 2011
    Publication date: October 27, 2011
    Applicant: SUMCO CORPORATION
    Inventors: Kazuhiro HARADA, Hisashi Furuya
  • Publication number: 20110036860
    Abstract: A single-crystal growth apparatus includes: a raw-material accumulation tube housed in a pull chamber; a bottom lid attached to a lower end opening of the raw-material accumulation tube; a shaft connected to the bottom lid to lift/lower the accumulation tube and bottom lid; a forward/backward movable raw-material guide tube having a leading end to be inserted through a side wall of the pull chamber into the raw-material accumulation tube; and a raw-material supply apparatus for supplying solid raw materials through the raw-material guide tube into the raw-material accumulation tube, in which the solid raw materials are supplied from the raw-material supply apparatus, through the raw-material guide tube, to the raw-material accumulation tube with the leading end of the raw-material guide tube being inserted into the raw-material accumulation tube, so as to accumulate the solid raw materials, and the bottom lid is lowered to drop the solid raw materials into a crucible.
    Type: Application
    Filed: February 26, 2009
    Publication date: February 17, 2011
    Applicant: Sumco Corporation
    Inventors: Toshiyuki Fujiwara, Takehiko Hosoi, Takuya Yotsui, Hisashi Furuya
  • Patent number: 7294203
    Abstract: A heat shielding member is provided in a device pulling up a silicon single crystal rod from a silicon melt stored in a quartz crucible, and equipped with a tube portion which shields radiant heat from the heater surrounding the outer peripheral face of the silicon single crystal rod, a swelling portion provided at the lower portion of the tube portion, and a ring-shape heat accumulating portion provided at the inside of the swelling portion. The heat accumulating portion is a thermal conductivity of 5 W/(m·° C.) or less, its inner peripheral face is a height (H1) of 10 mm or more and d/2 or less when the diameter of the silicon single crystal rod is referred to as d and the minimum distance (W1) between the outer peripheral face of the silicon single crystal rod and the inner peripheral face of the heat accumulating portion is formed so as to be 10 mm or more and 0.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: November 13, 2007
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Kazuhiro Harada, Yoji Suzuki, Senlin Fu, Hisashi Furuya, Hidenobu Abe
  • Publication number: 20060124052
    Abstract: A heat shielding member is provided in a device pulling up a silicon single crystal rod from a silicon melt stored in a quartz crucible, and equipped with a tube portion which shields radiant heat from the heater surrounding the outer peripheral face of the silicon single crystal rod, a swelling portion provided at the lower portion of the tube portion, and a ring-shape heat accumulating portion provided at the inside of the swelling portion. The heat accumulating portion is a thermal conductivity of 5 W/(m·° C.) or less, its inner peripheral face is a height (H1) of 10 mm or more and d/2 or less when the diameter of the silicon single crystal rod is referred to as d and the minimum distance (W1) between the outer peripheral face of the silicon single crystal rod and the inner peripheral face of the heat accumulating portion is formed so as to be 10 mm or more and 0.
    Type: Application
    Filed: September 12, 2003
    Publication date: June 15, 2006
    Inventors: Kazuhiro Harada, Yoji Suzuki, Senlin Fu, Hisashi Furuya, Hidenobu Abe
  • Publication number: 20040025983
    Abstract: An ingot is manufactured by pulling it up such that V/Ga and V/Gb become 0.23 to 0.50 mm2/minute. ° C., respectively, where V (mm/minute) is a pulling-up speed, and Ga (° C./mm) is an axial temperature gradient at the center of the ingot and Gb (° C./mm) is an axial temperature gradient at the edge of the ingot at temperatures in a range of 1,300° C. to a melting point of silicon. A wafer obtained by slicing the ingot is heat treated in a reductive atmosphere at temperatures in a range of 1,050° C. to 1,220° C. for 30 to 150 minutes. A silicon wafer free of OSF's, tree of COP's, and substantially free of contamination such as Fe and of occurrence of slip, is obtained.
    Type: Application
    Filed: July 28, 2003
    Publication date: February 12, 2004
    Inventors: Etsuro Morita, Takaaki Shiota, Yoshihisa Nonogaki, Yoshinobu Nakada, Hisashi Furuya, Hiroshi Koya, Jun Furukawa, Hideo Tanaka, Yuji Nakata
  • Patent number: 6682597
    Abstract: A method of heat-treating a silicon wafer has the steps of: preparing a silicon wafer having an oxygen concentration of 1.2×1018 atoms/cm3 or less (old ASTM) without generating crystal originated particles(COP'S) and interstitial-type large dislocation(L/D); forming a polysilicon layer of 0.1 &mgr;m to 1.6 &mgr;m in thickness on a back of the silicon wafer by a chemical-vapor deposition at a temperature of 670° C.±30° C.; and heat-treating the silicon wafer having the polysilicon layer in an oxygen atmosphere at 1000° C.±30° C. for 2 to 5 hours and subsequently at 1130° C.±30° C. for 1 to 16 hours. In this method, the silicon wafer before the formation of the polysilicon layer thereon is the type of a wafer in which oxidation induced stacking faults(OSF's) manifest itself at a center of the wafer when the wafer is subjected to the heat-treatment.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: January 27, 2004
    Assignee: Mitsubishi Materials Silicon Corporation
    Inventors: Hiroshi Koya, Hisashi Furuya, Yoji Suzuki, Yukio Muroi, Takaaki Shiota
  • Patent number: 6663708
    Abstract: An ingot is manufactured by pulling it up such that V/Ga and V/Gb become 0.23 to 0.50 mm2/minute ° C., respectively, where V (mm/minute) is a pulling-up speed, and Ga (° C./mm) is and axial temperature gradient at the center of the ingot and Gb (° C./mm) is an axial temperature gradient at the edge of the ingot at temperatures in a range of 1,300° C. to a melting pointy of silicon. A wafer obtained by slicing the ingot is heat treated in a reductive atmosphere at temperature in a renge of 1,050° C. to 1,220° C. for 30 to 150 minutes. A silicon wafer free of OSF's, free of COP's, and substantially free of contamination such as Fe and of occurence of slip, is obtained.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: December 16, 2003
    Assignee: Mitsubishi Materials Silicon Corporation
    Inventors: Etsuro Morita, Takaaki Shiota, Yoshihisa Nonogaki, Yoshinobu Nakada, Hisashi Furuya, Hiroshi Koya, Jun Furukawa, Hideo Tanaka, Yuji Nakata
  • Publication number: 20030051660
    Abstract: A method of heat-treating a silicon wafer has the steps of: preparing a silicon wafer having an oxygen concentration of 1.2×1018 atoms/cm3 or less (old ASTM) without generating crystal originated particles(COP'S) and interstitial-type large dislocation(L/D); forming a polysilicon layer of 0.1 &mgr;m to 1.6 &mgr;m in thickness on a back of the silicon wafer by a chemical-vapor deposition at a temperature of 670° C.±30° C.; and heat-treating the silicon wafer having the polysilicon layer in an oxygen atmosphere at 1000° C.±30° C. for 2 to 5 hours and subsequently at 1130° C.±30° C. for 1 to 16 hours. In this method, the silicon wafer before the formation of the polysilicon layer thereon is the type of a wafer in which oxidation induced stacking faults(OSF's) manifest itself at a center of the wafer when the wafer is subjected to the heat-treatment.
    Type: Application
    Filed: June 3, 2002
    Publication date: March 20, 2003
    Inventors: Hiroshi Koya, Hisashi Furuya, Yoji Suzuki, Yukio Muroi, Takaaki Shiota
  • Patent number: 6428619
    Abstract: A method of heat-treating a silicon wafer has the steps of: preparing a silicon wafer having an oxygen concentration of 1.2×1018 atoms/cm3 or less (old ASTM) without generating crystal originated particles(COP'S) and interstitial-type large dislocation(L/D); forming a polysilicon layer of 0.1 &mgr;m to 1.6 &mgr;m in thickness on a back of the silicon wafer by a chemical-vapor deposition at a temperature of 670° C.±30° C.; and heat-treating the silicon wafer having the polysilicon layer in an oxygen atmosphere at 1000° C.±30° C. for 2 to 5 hours and subsequently at 1130° C.±30° C. for 1 to 16 hours. In this method, the silicon wafer before the formation of the polysilicon layer thereon is the type of a wafer in which oxidation induced stacking faults(OSF's) manifest itself at a center of the wafer when the wafer is subjected to the heat-treatment.
    Type: Grant
    Filed: October 23, 2000
    Date of Patent: August 6, 2002
    Assignee: Mitsubishi Materials Silicon Corporation
    Inventors: Hiroshi Koya, Hisashi Furuya, Yoji Suzuki, Yukio Muroi, Takaaki Shiota
  • Patent number: 6379460
    Abstract: A thermal shield device is equipped in a crystal-pulling apparatus for pulling a silicon monocrystal ingot from a silicon melt reserved in a quartz crucible having an outer peripheral surface encircled with a heater. The thermal shield device has a tubular part to be used for surrounding a silicon monocrystal ingot being pulled and grown in an upward direction to prevent radiant heat from the heater toward the silicon monocrystal ingot. The tubular part has a lower end positioned above a surface of the silicon melt with a predetermined spacing therebetween. A protruding part is formed on a lower portion of the tubular part and filled with a thermal-insulating member. The protruding part extends to the inside of the tubular part and has a bottom wall, a vertical wall, and a top wall. The bottom wall is shaped like a ring having an outer edge connected to a lower edge of the tubular part and extends to the proximity of an outer peripheral surface of the silicon monocrystal ingot.
    Type: Grant
    Filed: August 23, 2000
    Date of Patent: April 30, 2002
    Assignee: Mitsubishi Materials Silicon Corporation
    Inventors: Kazuhiro Harada, Yoji Suzuki, Senlin Fu, Hisashi Furuya
  • Patent number: 5897706
    Abstract: An improvement in the safety, ease and speed with which the operation of attaching a crucible 1 to a support base 10 of a single crystal pulling apparatus can be completed is provided. With the method of attaching the crucible 1 to the support base 10, the support base 10 is divided into a support base bottom portion 11 and a support base drum portion 12 which is fitted to the bottom portion 11, and the crucible 1 is mounted on the support base bottom portion 11. The support base 10 is then assembled by fitting the support base drum portion 12 to the support base bottom portion 11.
    Type: Grant
    Filed: April 15, 1997
    Date of Patent: April 27, 1999
    Assignees: Mitsubishi Materials Silicon Corporation, Mitsubishi Materials Corporation
    Inventors: Masakazu Yamazaki, Michio Yanaba, Hiroaki Taguchi, Takashi Atami, Hisashi Furuya
  • Patent number: 5895527
    Abstract: The invention relates to a single crystal pulling apparatus comprising; an outer crucible 11 positioned inside a chamber (gas tight container) 2, for storing a semiconductor melt 21, and an inner crucible 30 comprising a cylindrical partition body, mounted inside the outer crucible 11 to form a double crucible, and wherein a single crystal of semiconductor 26 is pulled from the semiconductor melt 21 stored inside the inner crucible 30. With this arrangement, the inner crucible 30 is made from quartz and comprises an inside layer A, an outside layer C, and an intermediate layer B which lies between the inside layer A and the outside layer C, and the intermediate layer B is made from quartz with a larger gas bubble content than the quartz which makes up the inside layer A and the outside layer C of the inner crucible 30.
    Type: Grant
    Filed: January 29, 1997
    Date of Patent: April 20, 1999
    Assignees: Mitsubishi Materials Silicon Corporation, Mitsubishi Materials Quartz Corporation, Mitsubishi Materials Corporation
    Inventors: Hiroaki Taguchi, Takashi Atami, Hisashi Furuya, Masanori Fukui, Michio Kida
  • Patent number: 5891245
    Abstract: A single crystal pulling method employing; a gas tight container, a double crucible for storing a semiconductor melt inside the gas tight container comprising an inter-connected outer crucible and inner crucible, and a source material supply tube suspended from an upper portion of the gas tight container and positioned so that a granulated or powdered source material can be added from a lower end opening thereof to the semiconductor melt inside the outer crucible, with the source material being injected into the source material supply tube together with an inert gas flowing towards the enclosed container, characterized in that said source material is injected under conditions where the flow rate N (1/min.multidot.cm.sup.2) of the inert gas is within the range 0.0048P+0.0264<N<0.07P, where P (Torr) is the internal pressure inside said gas tight container.
    Type: Grant
    Filed: January 10, 1997
    Date of Patent: April 6, 1999
    Assignees: Mitsubishi Materials Sillcon Corporation, Mitsubishi Materials Corporation
    Inventors: Takashi Atami, Hiroaki Taguchi, Hisashi Furuya, Michio Kida
  • Patent number: 5873938
    Abstract: A single crystal pulling apparatus wherein a semiconductor melt is stored in an outer crucible, and a cylindrical inner crucible which acts as a partition body, is mounted inside the outer crucible to thus form a double crucible, and a single crystal of semiconductor is pulled from the semiconductor melt inside the inner crucible. The inner crucible contains a communicating portion, which is formed when the double crucible is formed, for allowing flow of the semiconductor melt into the inner crucible, and the communicating portion incorporates an arrangement for removal of gas bubbles which have adhered to the communicating portion.
    Type: Grant
    Filed: December 26, 1996
    Date of Patent: February 23, 1999
    Assignees: Mitsubishi Materials Silicon Corporation, Mitsubishi Materials Corporation
    Inventors: Takashi Atami, Hisashi Furuya, Michio Kida