Patents by Inventor Hisashi Kameoka

Hisashi Kameoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9142774
    Abstract: According to one embodiment, a nonvolatile memory device includes a first electrode, a second electrode, and a memory cell provided between the first electrode and the second electrode. The memory cell includes a retention unit, a resistance change unit, and an ion supply unit. The retention unit is provided on the first electrode and has an electron trap. The resistance change unit is provided on the retention unit. The ion supply unit is provided between the resistance change unit and the second electrode and includes a metal element.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: September 22, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidehiko Yabuhara, Takashi Hirotani, Junji Kataoka, Hisashi Kameoka
  • Publication number: 20150255486
    Abstract: A nonvolatile semiconductor storage device including a semiconductor substrate; a stack structure disposed above the substrate and including insulation layers and conductive layers stacked alternatively above one another; a select gate electrode layer disposed above the stack structure; at least one hole extending through the stack structure and the select gate electrode layer; at least one semiconductor pillar disposed along an inner side of the at least one hole; storage layers disposed between the at least one semiconductor pillar and the conductive layers; a gate insulating film disposed between the at least one semiconductor pillar and the select gate electrode layer; an isolation trench disposed so as to isolate the select gate electrode layer, the trench having a bottom portion being lower than an upper surface of an uppermost conductive layer; and a metal silicide disposed in a portion of the conductive layer in the uppermost layer contacting the trench.
    Type: Application
    Filed: March 4, 2015
    Publication date: September 10, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hisashi KAMEOKA, Daigo ICHINOSE
  • Publication number: 20150255485
    Abstract: A nonvolatile semiconductor storage device includes a semiconductor substrate; a stack structure disposed above the substrate and including insulation layers and conductive layers stacked alternatively; and a select gate electrode layer disposed above the stack structure; holes extending through the stack structure and the electrode layer; a connecting portion connecting lower portions of adjacent holes; and a pillar insulating film and semiconductor pillars disposed in the connected holes and in the connecting portion. A back gate is disposed between a portion above the connecting portion and the stack structure. An isolation trench is disposed between the adjacent and connected pillars to isolate the stack structure and the electrode layer. The trench has a bottom portion contacting the back gate. A bottom surface of the trench is lower than an upper surface of the back gate. A metal silicide is disposed in a portion where the back gate contacts the trench.
    Type: Application
    Filed: March 4, 2015
    Publication date: September 10, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hisashi KAMEOKA, Daigo ICHINOSE
  • Publication number: 20130153850
    Abstract: According to one embodiment, a nonvolatile memory device includes a first electrode, a second electrode, and a memory cell provided between the first electrode and the second electrode. The memory cell includes a retention unit, a resistance change unit, and an ion supply unit. The retention unit is provided on the first electrode and has an electron trap. The resistance change unit is provided on the retention unit. The ion supply unit is provided between the resistance change unit and the second electrode and includes a metal element.
    Type: Application
    Filed: December 14, 2012
    Publication date: June 20, 2013
    Inventors: Hidehiko Yabuhara, Takashi Hirotani, Junji Kataoka, Hisashi Kameoka