Patents by Inventor Hisashi Ohno

Hisashi Ohno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6045042
    Abstract: A non-contact IC card includes a CPU for processing data, a memory for storing a program for controlling the CPU, an antenna for transmitting data and receiving data manner, a plurality of receivers each having a different signal detection level for detecting a signal received by the antenna, a selector for selecting one of the plurality of receivers and connecting it to the CPU, and a transmitter for transmitting a signal from the CPU through the antenna.
    Type: Grant
    Filed: December 8, 1992
    Date of Patent: April 4, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hisashi Ohno
  • Patent number: 5773880
    Abstract: A non-contact IC card comprising a circuit board (10), an electronic circuit (9) mounted on the circuit board (10) and having a plurality of functions, a package (14) sealing the electronic circuit (9), a plurality of testing wire conductors (8) disposed on the circuit board (10) and connected at one end to the electronic circuit (9) and exposed at the other end from the package (14) for individually testing the functions of the electronic circuit (9). Each of the other end of the testing wire conductors (8) comprises a testing pad (11) disposed on the circuit board (10). The non-contact IC card may comprise insulating means electrically insulating the other end of the testing wire conductors or the testing pads (11) from outside.The present invention also resides in methods for manufacturing and testing the same.
    Type: Grant
    Filed: July 28, 1993
    Date of Patent: June 30, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hisashi Ohno
  • Patent number: 5424690
    Abstract: An oscillation circuit includes inversion circuits and delay circuits wherein at least one of the inversion circuits includes multiple inverters connected in series to one another and wherein the driving capability of a first stage inverter inserted immediately after the delay circuit at the input of the oscillation circuit is lower than that of a final stage inverter inserted immediately before the delay circuit at the output of the oscillation circuit.
    Type: Grant
    Filed: July 6, 1994
    Date of Patent: June 13, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hisashi Ohno
  • Patent number: 5355413
    Abstract: In an authentication method between an IC card and a terminal unit, authentication is performed without an authentication code or an address therefor being transmitted directly between the two devices so as to assure the security of the authentication operation. Both of the IC card and the terminal unit include multiple authentication codes each code having a corresponding time data item, and an encryption algorithm. In one of the IC card and the terminal unit, one of the authentication codes is selected, and the selected authentication code is encrypted according to the encryption algorithm. The encrypted authentication code is transmitted to the other device as authentication data. The time data corresponding to the selected authentication code is transmitted to the other device as a time interval between commands or signals. In the other device, the authentication code obtained from the time data is encrypted according to the encryption algorithm to generate authentication data.
    Type: Grant
    Filed: March 1, 1993
    Date of Patent: October 11, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hisashi Ohno
  • Patent number: 5247163
    Abstract: An IC card includes a CPU for processing data, a data receiving circuit for receiving data and inputting the data to the CPU, a data transmitting circuit for transmitting data from the CPU, a reset receiving device for receiving an external reset signal, a monitor timer for generating a timer reset signal when there is no response after a prescribed time has elapsed following receipt of data by the data receiving circuit, and a discrimination circuit for determining which of the external reset signal or a timer reset signal from the monitor timer has been received, holding the determination, and resetting the CPU in response to a reset signal.
    Type: Grant
    Filed: July 28, 1992
    Date of Patent: September 21, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hisashi Ohno, Kazuo Asami