Abstract: The size of a multi-processor is prevented from increasing even when the number of processor cores is increased. The multi-processor includes a plurality of cores and a debugging control unit. At least one of the plurality of cores is a debugging core, the debugging core being connected to the debugging control unit so that the debugging control unit can refer to and update register information in the debugging core. The debugging control unit transfers register information in a first core to the debugging core, the first core being one of the plurality of cores and being a core to be debugged. The debugging core debugs a program by using the transferred register information, the program being executed in the first core.

Abstract: The size of a multi-processor is prevented from increasing even when the number of processor cores is increased. The multi-processor includes a plurality of cores and a debugging control unit. At least one of the plurality of cores is a debugging core, the debugging core being connected to the debugging control unit so that the debugging control unit can refer to and update register information in the debugging core. The debugging control unit transfers register information in a first core to the debugging core, the first core being one of the plurality of cores and being a core to be debugged. The debugging core debugs a program by using the transferred register information, the program being to be executed in the first core.

Abstract: An image processing apparatus includes: a first memory that stores image data; a second memory that can be accessed at a speed higher than that in an access to the first memory; a first operation unit that executes a predetermined task on a predetermined area of the image data transferred from the first memory to the second memory; a second operation unit that determines whether there is an overlapping part of a first area of the image data executed corresponding to a first task executed by the first operation unit and a second area of the image data executed corresponding to a second task different from the first task; and a memory control apparatus that controls the first memory and the second memory. The memory control apparatus performs control to reuse the image data in the second memory when it is determined that there is an overlapping part.

Abstract: A memory interface circuit is connectable to a DDR-SDRAM which outputs read data in synchronization with a data strobe signal together with the data strobe signal. A clock generator generates internal clock signals and memory clock signals supplied to the DDR-SDRAM. The memory interface circuit determines a delay of arrival of the data strobe signal relative to the corresponding internal clock signal by using a data strobe signal inputted in a read cycle with respect to the DDR-SDRAM, samples the arrived read data, based on a signal obtained by shifting the phase of the arrived data strobe signal, and synchronizes the sampled read data to the corresponding internal clock signal on the basis of the result of determination of the arrival delay.

Abstract: An electronic circuit includes a first semiconductor device and a second semiconductor device on a mounting substrate. The mounting substrate lines have lengths which are made unequal for respective bits. Assembling lines which reach connecting electrodes of a semiconductor chip from the external terminals of the second semiconductor device have made lengths thereof unequal for respective bits. The unequal lengths of the mounting substrate lines have a relationship which offsets the unequal lengths of the assembling lines.

Abstract: A memory interface circuit is connectable to a DDR-SDRAM which outputs read data in synchronization with a data strobe signal together with the data strobe signal. A clock generator generates internal clock signals and memory clock signals supplied to the DDR-SDRAM. The memory interface circuit determines a delay of arrival of the data strobe signal relative to the corresponding internal clock signal by using a data strobe signal inputted in a read cycle with respect to the DDR-SDRAM, samples the arrived read data, based on a signal obtained by shifting the phase of the arrived data strobe signal, and synchronizes the sampled read data to the corresponding internal clock signal on the basis of the result of determination of the arrival delay.

Abstract: A memory interface circuit is connectable to a DDR-SDRAM which outputs read data in synchronization with a data strobe signal together with the data strobe signal. A clock generator generates internal clock signals and memory clock signals supplied to the DDR-SDRAM. The memory interface circuit determines a delay of arrival of the data strobe signal relative to the corresponding internal clock signal by using a data strobe signal inputted in a read cycle with respect to the DDR-SDRAM, samples the arrived read data, based on a signal obtained by shifting the phase of the arrived data strobe signal, and synchronizes the sampled read data to the corresponding internal clock signal on the basis of the result of determination of the arrival delay.

Abstract: An electronic circuit includes a first semiconductor device (4) and a second semiconductor device (3) on a mounting substrate. The mounting substrate includes a plurality of mounting substrate lines (201 to 204) which are connected in common with external terminals of a plurality of bits of the first semiconductor device and external terminals of a plurality of bits of the second semiconductor device for every bit. The mounting substrate lines have lengths thereof from the external terminals of the first semiconductor device to the external terminals of the second semiconductor device made unequal for respective bits. Assembling lines (361 to 364) which reach connecting electrodes of a semiconductor chip from the external terminals of the second semiconductor device have made lengths thereof unequal for respective bits. Here, the unequal lengths of the mounting substrate lines have a relationship which offsets the unequal lengths of the assembling lines.

Abstract: A memory interface circuit is connectable to a DDR-SDRAM which outputs read data in synchronization with a data strobe signal together with the data strobe signal. A clock generator generates internal clock signals and memory clock signals supplied to the DDR-SDRAM. The memory interface circuit determines a delay of arrival of the data strobe signal relative to the corresponding internal clock signal by using a data strobe signal inputted in a read cycle with respect to the DDR-SDRAM, samples the arrived read data, based on a signal obtained by shifting the phase of the arrived data strobe signal, and synchronizes the sampled read data to the corresponding internal clock signal on the basis of the result of determination of the arrival delay.

Abstract: Conventional batteries are disadvantageous in that a firm outer case must be used to maintain an electrical connection between electrodes, which has been an obstacle to size reduction. Those in which each electrode and a separator are joined with an adhesive resin suffer from conflict between adhesive strength and battery characteristics, particularly ion conductivity and internal resistivity. To solve these problems, it is an object of the invention to reduce resistance between electrodes, i.e., internal resistance of a battery to improve battery characteristics while securing both insulation function against electron conduction and ion conductivity between electrodes and also to maintain adhesive strength enough to firmly join the electrodes thereby to provide a light, compact and thin battery. The internal resistivity can be diminished by joining a positive electrode and a negative electrode with an adhesive resin layer having at least one adhesive resin layer containing a filler.

Abstract: Conventional batteries have the problem that, when battery temperature rises above a temperature at which the separator melts and flows due to an internal short-circuit, a large short-circuit current is generated between the positive and negative electrodes, that further raises the battery temperature. As a result, the short-circuit current further increases. The inventive electrode increases its resistivity with increasing temperature, and a processing for producing the electrode is disclosed. The electrode of the invention has an electron conductive material containing a conductive filler and a resin and increases its resistivity with increasing temperature.

Abstract: A multilayer electrode battery which restrains temperature rise produced by an internal short circuit and has a compact size and a large battery capacity. The battery is a multilayer electrode battery which uses an electrode formed by providing positive temperature coefficient characteristics to at least one of an active material and an electronic conductive material in contact with the active material, and a collector of at least one of a positive electrode and a negative electrode, and which has a plurality of layers of multilayer electrode bodies.

Abstract: Conventional separators had a function that their melting made minute holes inside the separator smaller, leading to cut off of ion conductivity in temperature increase due to unusual conditions such as short circuit. However, there was a problem that, at a temperature higher than a certain degree, not only the minute holes were closed but also the separator itself was melted to cause deformation of the separator such as shrink and generation of holes due to melting and insulation was broken. The present invention has been carried out in order to solve the above problems. The separator for batteries of the present invention comprises a first porous layer (3a) containing a thermoplastic resin as a main component and a second porous layer (3b) laminated on the first porous layer (3a), which has higher heat resistance than that of the first porous layer (3a).

Abstract: In case of a conventional battery having a laminated sheet material as a battery case for storing a battery body, the metal foil on the laminated sheet does not contact to either a positive electrode or a negative electrode and electric potential is unstable. Therefore, there was a problem that it was impossible to obtain electrical shielding effect. In order to maintain the function of the sealed part in the battery case, an extended part extended from the sealed part is disposed at a position where it overlaps with the positive electrode lead or the negative electrode lead, and by jointing the lead and the extended part with the conductive material piercing therethrough, the metal foil on the laminated sheet material of the battery case is electrically connected to the lead to maintain the electric potential of the battery case to the electric potential of the positive electrode or the negative electrode.

Abstract: The battery of the present invention comprises the electrode which contains the pre-determined amount of electronically conductive material at which resistance increases in accordance with temperature rise and conductive agent; the electrode wherein the ratio of the total amount of the electronically conductive material and the conductive agent to the active material is set to a pre-determined value; and the electrode wherein the average particle size of the conductive agent based on the average particle size of the electronically conductive material is in a pre-determined range. The coducitive material contains an electrically conductive filler and a crystalline resin. The conductive material and the coductive agent are contacted with the active material. A significant reduction in short circuit current is achieved over a defined range of conductive agent particle size.

Abstract: A method for manufacturing a lithium ion secondary battery comprising preparing a positive electrode (3) where a positive electrode active material (7) is joined with a positive electrode collector (6), a negative electrode (5) where a negative electrode active material (9) is joined with a negative electrode collector (10), and a separator (4) for retaining the electrolytes including lithium ions, being arranged between the positive electrode (3) and the negative electrode (5), the process of supplying adhesive solution applied on the separator with a second solvent different from a first solvent after applying the adhesive resin solution, where adhesive resin (11) is dissolved in the above first solvent, to the separator (4), and the process of forming an electrode laminate by sticking the positive electrode (3) and the negative electrode (5) to the separator (4).

Abstract: Conventional batteries have a problem that, in case the battery temperature should rise to 100° C. or higher due to an internal short-circuit, etc., a large short-circuit current develops to generate heat. It follows that the battery temperature further increases, which can result in a further increase of the short-circuit current. Further, some of electrode structures involve reduction in discharge capacity. These problems are solved by a battery in which an electron conductive material (9), being in contact with an active material (8) in an electrode, comprises a conductive filler and a resin so that the electrode may increase its resistivity with a temperature rise, and the ratio of the particle size of the electron conductive material (9) to that of the active material (8) is in a range of from 0.1 to 20.

Abstract: A conventional battery has a problem that a large short-circuit current was generated with temperature rise due to internal short-circuit or the like, and therefore, the temperature of the battery further increases due to exothermic reaction to increase the short-circuit current. The present invention has been carried out in order to solve the above problems. The battery of the present invention is a battery wherein at least one of a positive electrode 1 and a negative electrode 2 comprises an active material layer 6 containing an active material 8 and an electronically conductive material 9 contacted to the active material 8, wherein a solid electrolytic layer 3 is interposed between the above positive electrode 1 and the negative electrode 2, and wherein the above electronically conductive material 9 comprises an electrically conductive filler and a resin so that resistance increases with temperature rise.

Abstract: A secondary battery having a positive electrode, a negative electrode, and a separator that is arranged between the two electrodes. A porous adhesive resin layer has through holes and the resin layer is formed between the separator and one of the positive electrode and the negative electrode to bond the separator to the one of positive and negative electrodes.

Abstract: There is provided a package for a non-aqueous electrolytic battery by which water invasion from outside is lowered and adhesion strength is improved over the long term, and a non-aqueous electrolytic battery having a lengthened life and high reliability. In a package for a non-aqueous electrolytic battery having a bag construction to store a battery content made by adhesion of a part of a lamination film comprising a metal layer and a resin layer, the adhesion part holds a structure capable of reacting with or absorbing an element which diffuses from the battery interior inwardly to the battery interior side.