Patents by Inventor Hisataka Hayashi

Hisataka Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7419613
    Abstract: A support electrode (2) and a counter electrode (16) constituting parallel plate electrodes are disposed in a process vessel (1). A substrate (W) with an organic material film formed thereon is supported by the support electrode (2). A high-frequency power of a frequency of 40 MHz or above for generating the plasma is applied to the support electrode (2), so that a high-frequency electric field is formed between the support electrode (2) and the counter electrode (16). A process gas is supplied into the process vessel (1) to generate plasma of the process gas by the high-frequency electric field. The organic material film on the substrate (W) is etched with the plasma, with an organic material film serving as a mask. The process gas includes an ionization accelerating gas, such as Ar, that is ionized from a ground state or metastable state with an ionization energy of 10 eV or below and has a maximum ionization cross-section of 2×1016 cm2 or above.
    Type: Grant
    Filed: December 25, 2003
    Date of Patent: September 2, 2008
    Assignees: Tokyo Electron Limited, Kabushiki Kaisha Toshiba
    Inventors: Masanobu Honda, Shoichiro Matsuyama, Kazuya Nagaseki, Hisataka Hayashi
  • Publication number: 20070254472
    Abstract: A manufacturing method of a semiconductor device is carried out as follows. A first mask layer having a first linear opening pattern is formed above the first interlayer insulating layer. A second mask layer having a plurality of second linear opening patterns and first dummy opening patterns is formed above the first mask layer. The plurality of second linear opening patterns are aligned above the first linear opening pattern at given intervals to cross the first linear opening pattern. The first dummy opening patterns are arranged in close proximity to a first pattern remaining region that is present between the second linear opening patterns adjacent to each other. The first interlayer insulating layer that is present below opening patterns obtained by overlap portions of the first linear opening pattern and the second linear opening patterns is etched to form holes.
    Type: Application
    Filed: April 6, 2007
    Publication date: November 1, 2007
    Inventor: Hisataka Hayashi
  • Patent number: 7285498
    Abstract: An etching method etches an organic film by using an inorganic film as a mask at a high etch rate, in a satisfactory etch profile in a satisfactory in-plane uniformity without causing the inorganic film to peel off. An organic film formed on a workpiece is etched by using an inorganic film as a mask with a plasma produced by discharging an etching gas in a processing vessel (1). The etching method uses a mixed gas containing NH3 gas and O2 gas for etching the organic film when the organic film is to be etched in a pattern having an opening ratio of 40% or above. The etching method uses NH3 gas as an etching gas for etching the organic film when the organic film is to be etched in a pattern having an opening ratio below 40%.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: October 23, 2007
    Assignees: Tokyo Electron Limited, Kabushiki Kaisha Toshiba
    Inventors: Kazuto Ogawa, Rie Inazawa, legal representative, Hisataka Hayashi, Tokuhisa Ohiwa, Koichiro Inazawa, deceased
  • Publication number: 20060213865
    Abstract: A support electrode (2) and a counter electrode (16) constituting parallel plate electrodes are disposed in a process vessel (1). A substrate (W) with an organic material film formed thereon is supported by the support electrode (2). A high-frequency power of a frequency of 40 MHz or above for generating the plasma is applied to the support electrode (2), so that a high-frequency electric field is formed between the support electrode (2) and the counter electrode (16). A process gas is supplied into the process vessel (1) to generate plasma of the process gas by the high-frequency electric field. The organic material film on the substrate (W) is etched with the plasma, with an organic material film serving as a mask. The process gas includes an ionization accelerating gas, such as Ar, that is ionized from a ground state or metastable state with an ionization energy of 10 eV or below and has a maximum ionization cross-section of 2×1016 cm2 or above.
    Type: Application
    Filed: December 25, 2003
    Publication date: September 28, 2006
    Applicants: Tokyo Electron Limited, Kabushiki Kaisha Toshiba
    Inventors: Masanobu Honda, Shoichiro Matsuyama, Kazuya Nagaseki, Hisataka Hayashi
  • Publication number: 20060191867
    Abstract: A method of forming an organic film disposes a substrate on which the organic film is formed in a chamber capable of reducing a pressure therein, introduces a gas including a deuterium compound or a trideuterium compound in the chamber, to generate a plasma by ionizing the gas; and etches and patterning the organic film by the plasma.
    Type: Application
    Filed: February 7, 2006
    Publication date: August 31, 2006
    Inventor: Hisataka Hayashi
  • Publication number: 20050103441
    Abstract: There is provided an etching method and a plasma etching apparatus capable of taking a large etching selection ratio and of forming a hole having an appropriate shape. When etching an etching target film 204 by using an organic film 202 having a predetermined pattern as a mask, processing gas is introduced into an airtight processing container 104. There are provided a high frequency power source 122 of 40 MHz and a high frequency power source 128 of 3.2 MHz, by which two different kinds of high frequency powers are applied to a lower electrode 106. The power of each high frequency power is properly combined, thereby executing the etching process by using low plasma electron density Ne and high self-bias voltage Vdc which are generated by high frequency power.
    Type: Application
    Filed: May 13, 2004
    Publication date: May 19, 2005
    Inventors: Masanobu Honda, Kazuya Nagaseki, Hanako Kida, Koichi Yatsuda, Youbun Ito, Koichiro Inazawa, Rie Inazawa, Hisataka Hayashi
  • Publication number: 20050082256
    Abstract: The present invention is a plasma etching method including: an arranging step of arranging a pair of electrodes oppositely in a chamber and making one of the electrodes support a substrate to be processed in such a manner that the substrate is arranged between the electrodes, the substrate having an organic-material film; and an etching step of applying a high-frequency electric power to at least one of the electrodes to form a high-frequency electric field between the pair of the electrodes, supplying a process gas into the chamber to form a plasma of the process gas by means of the electric field, and plasma-etching the organic-material film of the substrate by means of the plasma partway in order to form a groove having a flat bottom. A frequency of the high-frequency electric power applied to the at least one of the electrodes is 50 to 150 MHz in the etching step.
    Type: Application
    Filed: October 8, 2004
    Publication date: April 21, 2005
    Inventors: Masanobu Honda, Kazuya Nagaseki, Hisataka Hayashi
  • Publication number: 20050085077
    Abstract: An etching method etches an organic film by using an inorganic film as a mask at a high etch rate, in a satisfactory etch profile in a satisfactory in-plane uniformity without causing the inorganic film to peel off. An organic film formed on a workpiece is etched by using an inorganic film as a mask with a plasma produced by discharging an etching gas in a processing vessel (1). The etching method uses a mixed gas containing NH3 gas and O2 gas for etching the organic film when the organic film is to be etched in a pattern having an opening ratio of 40% or above. The etching method uses NH3 gas as an etching gas for etching the organic film when the organic film is to be etched in a pattern having an opening ratio below 40%.
    Type: Application
    Filed: October 4, 2004
    Publication date: April 21, 2005
    Inventors: Kazuto Ogawa, Koichiro Inazawa, Hisataka Hayashi, Tokuhisa Ohiwa, Rie Inazawa
  • Publication number: 20050039854
    Abstract: The present invention is a plasma etching method including: an arranging step of arranging a pair of electrodes oppositely in a chamber and making one of the electrodes support a substrate to be processed in such a manner that the substrate is arranged between the electrodes, the substrate having a silicon film and an inorganic-material film adjacent to the silicon film; and an etching step of applying a high-frequency electric power to at least one of the electrodes to form a high-frequency electric field between the pair of the electrodes, supplying a process gas into the chamber to form a plasma of the process gas by means of the electric field, and selectively plasma-etching the silicon film of the substrate by means of the plasma; wherein a frequency of the high-frequency electric power applied to the at least one of the electrodes is 50 to 150 MHz in the etching step.
    Type: Application
    Filed: October 7, 2004
    Publication date: February 24, 2005
    Inventors: Shoichiro Matsuyama, Masanobu Honda, Kazuya Nagaseki, Hisataka Hayashi
  • Publication number: 20050009356
    Abstract: A method of manufacturing a semiconductor device according to an aspect of the present invention includes: forming a low-k dielectric film above a semiconductor substrate; forming a resist pattern above the low-k dielectric film; etching the low-k dielectric film using the resist pattern as a mask; and stripping the resist pattern by plasma processing using ammonium ions.
    Type: Application
    Filed: May 12, 2004
    Publication date: January 13, 2005
    Inventors: Akihiro Kojima, Junko Ohuchi, Hisataka Hayashi
  • Publication number: 20040238126
    Abstract: A plasma processing apparatus comprises a grounded housing, a thin RF plate electrode, an opposite electrode facing the RF plate electrode, and a RF power source for applying a radio frequency to either the RF plate electrode or the opposite electrode to produce plasma between the two electrodes. If the radio frequency applied to the electrode is f (MHz), the parasitic capacity C (pF) between the grounded portion of the housing and a conductive portion through which the radio frequency propagates is less than 1210*f−0.9. The thickness of the RF plate electrode is 1 mm to 6 mm, and it is supported by a heat sink. The heat sink has a coolant passage in the proximity to the RF plate electrode. The heat sink also has a groove or a cavity in addition to the coolant passage, thereby reducing the value of the dielectric constant of the heat sink as a whole.
    Type: Application
    Filed: July 2, 2004
    Publication date: December 2, 2004
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hisataka Hayashi, Kazuhiro Tomioka, Itsuko Sakai, Tokuhisa Ohiwa, Akihiro Kojima
  • Publication number: 20040219797
    Abstract: The present invention is a plasma etching method including: an arranging step of arranging a pair of electrodes oppositely in a chamber and making one of the electrodes support a substrate to be processed in such a manner that the substrate is arranged between the electrodes, the substrate having an organic-material film and an inorganic-material film; and an etching step of applying a high-frequency electric power to at least one of the electrodes to form a high-frequency electric field between the pair of the electrodes, supplying a process gas into the chamber to form a plasma of the process gas by means of the electric field, and selectively plasma-etching the organic-material film of the substrate with respect to the inorganic-material film by means of the plasma; wherein a frequency of the high-frequency electric power applied to the at least one of the electrodes is 50 to 150 MHz in the etching step.
    Type: Application
    Filed: June 4, 2004
    Publication date: November 4, 2004
    Inventors: Masanobu Honda, Kazuya Nagaseki, Koichiro Inazawa, Shoichiro Matsuyama, Hisataka Hayashi
  • Patent number: 6794286
    Abstract: A semiconductor device comprises a semiconductor substrate in which a semiconductor element is formed, an interlayer insulating film formed on the semiconductor substrate, an insulating barrier layer, formed on the interlayer insulating film by plasma nitriding, for preventing diffusion of a metal constituting a wiring layer, a conductive barrier layer, formed on the insulating barrier layer, for preventing diffusion of the metal, and a wiring layer formed of the metal on the conductive barrier layer. A bottom portion of the wiring layer is protected by the conductive barrier layer and the insulating barrier layer. Therefore, the diffusion of the metal constituting the wiring layer can be surely prevented.
    Type: Grant
    Filed: April 26, 2000
    Date of Patent: September 21, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisako Aoyama, Kyoichi Suguro, Hiromi Niiyama, Hitoshi Tamura, Hisataka Hayashi, Tomonori Aoyama, Gaku Minamihaba, Tadashi Iijima
  • Patent number: 6780278
    Abstract: A plasma processing apparatus comprises a grounded housing, a thin RF plate electrode, an opposite electrode facing the RF plate electrode, and a RF power source for applying a radio frequency to either the RF plate electrode or the opposite electrode to produce plasma between the two electrodes. If the radio frequency applied to the electrode is f (MHz), the parasitic capacity C (pF) between the grounded portion of the housing and a conductive portion through which the radio frequency propagates is less than 1210*f−0.9. The thickness of the RF plate electrode is 1 mm to 6 mm, and it is supported by a heat sink. The heat sink has a coolant passage in the proximity to the RF plate electrode. The heat sink also has a groove or a cavity in addition to the coolant passage, thereby reducing the value of the dielectric constant of the heat sink as a whole.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: August 24, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisataka Hayashi, Kazuhiro Tomioka, Itsuko Sakai, Tokuhisa Ohiwa, Akihiro Kojima
  • Publication number: 20030181031
    Abstract: Disclosed is a method for manufacturing a semiconductor device comprising forming, above a semiconductor substrate on which elements are formed, a wiring layer with a metal nitride film on its surface, forming an insulating film on the wiring layer, forming a mask pattern on the insulating film, forming a via hole in the insulating film by reactive ion etching using the mask pattern as an etching mask, thereby exposing the metal nitride film, removing the mask pattern, and performing plasma treatment of a surface of the metal nitride film using a nitrogen-containing gas.
    Type: Application
    Filed: November 4, 2002
    Publication date: September 25, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akihiro Kojima, Tokuhisa Ohiwa, Hisataka Hayashi
  • Patent number: 6576562
    Abstract: A manufacturing method of semiconductor device comprises forming a mask material having an aromatic ring and carbon content of 80 wt % or more on an object, forming a mask material pattern by etching the mask material to a desired pattern, and etching the object to transfer the mask material pattern as a mask to the object.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: June 10, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junko Ohuchi, Yasuhiko Sato, Eishi Shiobara, Hisataka Hayashi, Tokuhisa Ohiwa, Yasunobu Onishi
  • Publication number: 20020173116
    Abstract: A semiconductor device comprises a semiconductor substrate in which a semiconductor element is formed, an interlayer insulating film formed on the semiconductor substrate, an insulating barrier layer, formed on the interlayer insulating film by plasma nitriding, for preventing diffusion of a metal constituting a wiring layer, a conductive barrier layer, formed on the insulating barrier layer, for preventing diffusion of the metal, and a wiring layer formed of the metal on the conductive barrier layer. A bottom portion of the wiring layer is protected by the conductive barrier layer and the insulating barrier layer. Therefore, the diffusion of the metal constituting the wiring layer can be surely prevented.
    Type: Application
    Filed: April 26, 2000
    Publication date: November 21, 2002
    Inventors: Hisako Apyama, Kyoichi Suguro, Hitoshi Tamura, Hisataka Hayashi, Tomonori Aoyama, Gaku Minamihaba, Tadashi Iijima
  • Publication number: 20020119612
    Abstract: A manufacturing method of semiconductor device comprises forming a mask material having an aromatic ring and carbon content of 80 wt % or more on an object, forming a mask material pattern by etching the mask material to a desired pattern, and etching the object to transfer the mask material pattern as a mask to the object.
    Type: Application
    Filed: December 14, 2001
    Publication date: August 29, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Junko Ohuchi, Yasuhiko Sato, Eishi Shiobara, Hisataka Hayashi, Tokuhisa Ohiwa, Yasunobu Onishi
  • Patent number: 6420271
    Abstract: A method of forming a pattern comprising the steps of, forming a lower film on a substrate, the lower film being a film containing carbon atom at a ratio of 80 wt % or more, or a vapor phase deposition film, either applying an adhesion-promoting treatment to a surface of the lower film or forming an adhesion-promoting on the lower film, forming an intermediate film on a surface of the lower film, forming a resist film on the intermediate film, forming a resist pattern by conducting a patterning exposure of the resist film, forming an intermediate film pattern by transferring the resist pattern to the intermediate film, and forming a lower film pattern by transferring the intermediate film pattern to the lower film.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: July 16, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Sato, Eishi Shiobara, Motoyuki Sato, Yasunobu Onishi, Hiroshi Tomita, Tokuhisa Ohiwa, Junko Ohuchi, Hisataka Hayashi
  • Publication number: 20020042204
    Abstract: A plasma processing apparatus comprises a grounded housing, a thin RF plate electrode, an opposite electrode facing the RF plate electrode, and a RF power source for applying a radio frequency to either the RF plate electrode or the opposite electrode to produce plasma between the two electrodes. If the radio frequency applied to the electrode is f (MHz), the parasitic capacity C (pF) between the grounded portion of the housing and a conductive portion through which the radio frequency propagates is less than 1210*f−0.9. The thickness of the RF plate electrode is 1 mm to 6 mm, and it is supported by a heat sink. The heat sink has a coolant passage in the proximity to the RF plate electrode. The heat sink also has a groove or a cavity in addition to the coolant passage, thereby reducing the value of the dielectric constant of the heat sink as a whole.
    Type: Application
    Filed: June 28, 2001
    Publication date: April 11, 2002
    Inventors: Hisataka Hayashi, Kazuhiro Tomioka, Itsuko Sakai, Tokuhisa Ohiwa, Akihiro Kojima