Patents by Inventor Hisato Michikoshi

Hisato Michikoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11881524
    Abstract: A semiconductor device includes: a first semiconductor chip having first and second electrodes on a first surface and having a third electrode on a second surface; a second semiconductor chip having first and second electrodes on a first surface and having a third electrode on a second surface; a first electrode plate bonded to the second electrode of the first semiconductor chip; a second electrode plate bonded to the third electrode of the second semiconductor chip; and a third electrode plate having a first area sandwiched between the first and second semiconductor chips and a second area not sandwiched between the first and second semiconductor chips, one surface of the first area is bonded to the second electrode of the second semiconductor chip, and another surface is bonded to the third electrode of the first semiconductor chip, and the first area is thinner than the second area.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: January 23, 2024
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Hisato Michikoshi
  • Patent number: 11715767
    Abstract: A silicon carbide semiconductor device includes a metal plate having a first main surface and a second main surface, the second main surface being opposite to the first main surface, an insulating film provided on a portion of the first main surface of the metal plate, a first conductive layer provided on the insulating film, and a silicon carbide semiconductor chip. The silicon carbide semiconductor chip includes a first electrode and a second electrode on a first surface and a third electrode on a second surface, the second surface being opposite to the first surface. The first surface of the silicon carbide semiconductor chip faces the first main surface of the metal plate, the first electrode is bonded to the first conductive layer with a first bonding material, and the second electrode is bonded to the first main surface of the metal plate with a second bonding material.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: August 1, 2023
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Hisato Michikoshi
  • Patent number: 11710682
    Abstract: A semiconductor device includes: a first electrode terminal; a second electrode terminal; a semiconductor element having an electrode on one surface connected to one surface of the first electrode terminal; a wire that connects an electrode on the other surface of the semiconductor element and the second electrode terminal; and a resin portion formed of an insulator covering the semiconductor element, a part of the second electrode terminal, and the one surface of the first electrode terminal, wherein a chamfered portion is formed on at least one of end portions where the first electrode terminal and the second electrode terminal face each other.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: July 25, 2023
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Hisato Michikoshi
  • Publication number: 20220165851
    Abstract: A silicon carbide semiconductor device includes a metal plate having a first main surface and a second main surface, the second main surface being opposite to the first main surface, an insulating film provided on a portion of the first main surface of the metal plate, a first conductive layer provided on the insulating film, and a silicon carbide semiconductor chip. The silicon carbide semiconductor chip includes a first electrode and a second electrode on a first surface and a third electrode on a second surface, the second surface being opposite to the first surface. The first surface of the silicon carbide semiconductor chip faces the first main surface of the metal plate, the first electrode is bonded to the first conductive layer with a first bonding material, and the second electrode is bonded to the first main surface of the metal plate with a second bonding material.
    Type: Application
    Filed: March 3, 2020
    Publication date: May 26, 2022
    Inventor: Hisato MICHIKOSHI
  • Publication number: 20220052189
    Abstract: A semiconductor device includes: a first semiconductor chip having a first electrode and a second electrode on a first surface and having a third electrode on a second surface that is opposite to the first surface; a second semiconductor chip having a first electrode and a second electrode on a first surface and having a third electrode on a second surface that is opposite to the first surface; a first electrode plate bonded to the second electrode of the first semiconductor chip by a bonding material; a second electrode plate bonded to the third electrode of the second semiconductor chip by a bonding material; and a third electrode plate placed between the first semiconductor chip and the second semiconductor chip and having a first area sandwiched between the first semiconductor chip and the second semiconductor chip and a second area not sandwiched between the first semiconductor chip and the second semiconductor chip, wherein one surface of the first area of the third electrode plate is bonded to the seco
    Type: Application
    Filed: March 5, 2020
    Publication date: February 17, 2022
    Inventor: Hisato MICHIKOSHI
  • Publication number: 20210313257
    Abstract: A semiconductor device includes: a first electrode terminal; a second electrode terminal; a semiconductor element having an electrode on one surface connected to one surface of the first electrode terminal; a wire that connects an electrode on the other surface of the semiconductor element and the second electrode terminal; and a resin portion formed of an insulator covering the semiconductor element, a part of the second electrode terminal, and the one surface of the first electrode terminal, wherein a chamfered portion is formed on at least one of end portions where the first electrode terminal and the second electrode terminal face each other.
    Type: Application
    Filed: June 16, 2021
    Publication date: October 7, 2021
    Inventor: Hisato MICHIKOSHI
  • Patent number: 11094615
    Abstract: A semiconductor device, a drain electrode terminal supporting the semiconductor device and connected directly to a drain electrode pad, a source electrode terminal connected to a source electrode pad, and a gate electrode terminal are provided, wherein the source electrode terminal includes a wire post, a first lead extending from one end of the wire post, and a second lead extending from another end of the wire post, wherein the source electrode pad and the wire post of the source electrode terminal are connected to each other through a plurality of bonding wires, and wherein the semiconductor device, a surface, supporting the semiconductor device thereon, of the drain electrode terminal, the wire post of the source electrode terminal, the bonding wires, and part of the gate electrode terminal are covered with a mold resin.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: August 17, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Hisato Michikoshi
  • Patent number: 11069603
    Abstract: A semiconductor device includes: a first electrode terminal; a second electrode terminal; a semiconductor element having an electrode on one surface connected to one surface of the first electrode terminal; a wire that connects an electrode on the other surface of the semiconductor element and the second electrode terminal; and a resin portion formed of an insulator covering the semiconductor element, a part of the second electrode terminal, and the one surface of the first electrode terminal, wherein a chamfered portion is formed on at least one of end portions where the first electrode terminal and the second electrode terminal face each other.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: July 20, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Hisato Michikoshi
  • Patent number: 11043465
    Abstract: A semiconductor device includes a semiconductor chip made of material containing silicon carbide, a base plate including a plate-shaped insulating body and metal layers disposed on opposite faces thereof, and a bonding material bonding the semiconductor chip on one face of the base plate, wherein the bonding material is made of a metal material whose post-bonding melting point is greater than or equal to 773° C., wherein a thickness of the bonding material is less than or equal to 50 micrometers, wherein a thickness of the base plate is greater than or equal to 500 micrometers, and wherein with a thickness of the insulating body being denoted as tI, and a thickness of each of the metal layers being denoted as tM, a value of tI/tM is greater than or equal to 4.3.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: June 22, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiroshi Notsu, Hisato Michikoshi
  • Publication number: 20200365546
    Abstract: A semiconductor device includes a semiconductor chip made of material containing silicon carbide, a base plate including a plate-shaped insulating body and metal layers disposed on opposite faces thereof, and a bonding material bonding the semiconductor chip on one face of the base plate, wherein the bonding material is made of a metal material whose post-bonding melting point is greater than or equal to 773° C., wherein a thickness of the bonding material is less than or equal to 50 micrometers, wherein a thickness of the base plate is greater than or equal to 500 micrometers, and wherein with a thickness of the insulating body being denoted as tI, and a thickness of each of the metal layers being denoted as tM, a value of tI/tM is greater than or equal to 4.3.
    Type: Application
    Filed: December 12, 2017
    Publication date: November 19, 2020
    Inventors: Hiroshi NOTSU, Hisato MICHIKOSHI
  • Publication number: 20200350235
    Abstract: A semiconductor device, a drain electrode terminal supporting the semiconductor device and connected directly to a drain electrode pad, a source electrode terminal connected to a source electrode pad, and a gate electrode terminal are provided, wherein the source electrode terminal includes a wire post, a first lead extending from one end of the wire post, and a second lead extending from another end of the wire post, wherein the source electrode pad and the wire post of the source electrode terminal are connected to each other through a plurality of bonding wires, and wherein the semiconductor device, a surface, supporting the semiconductor device thereon, of the drain electrode terminal, the wire post of the source electrode terminal, the bonding wires, and part of the gate electrode terminal are covered with a mold resin.
    Type: Application
    Filed: September 13, 2018
    Publication date: November 5, 2020
    Inventor: Hisato MICHIKOSHI
  • Publication number: 20200176424
    Abstract: A semiconductor apparatus includes an electrode terminal, a substrate disposed on the electrode terminal and made of an insulating material, a first power semiconductor device disposed on the electrode terminal, and a second power semiconductor device disposed on the substrate, wherein the first power semiconductor device and the second power semiconductor device are connected in series.
    Type: Application
    Filed: February 6, 2018
    Publication date: June 4, 2020
    Inventor: Hisato MICHIKOSHI
  • Publication number: 20200135624
    Abstract: A semiconductor device includes: a first electrode terminal; a second electrode terminal; a semiconductor element having an electrode on one surface connected to one surface of the first electrode terminal; a wire that connects an electrode on the other surface of the semiconductor element and the second electrode terminal; and a resin portion formed of an insulator covering the semiconductor element, a part of the second electrode terminal, and the one surface of the first electrode terminal, wherein a chamfered portion is formed on at least one of end portions where the first electrode terminal and the second electrode terminal face each other.
    Type: Application
    Filed: February 6, 2018
    Publication date: April 30, 2020
    Inventor: Hisato MICHIKOSHI
  • Patent number: 10290602
    Abstract: Inexpensive production is achieved while avoiding the degradation of electrical performance caused by the lowering of heat dissipation. The base plate 11 used here has a linear expansion coefficient of 2 to 10 ppm/K, which differs from the linear expansion coefficient of the semiconductor chip 13 by an absolute value of 7 ppm/K or smaller. The bonding layer 12 is formed such that the thickness b thereof is 50 micrometers or smaller, which is thinner than the thickness c of the semiconductor chip 13. Since the thickness b of the bonding layer 12 is thinner than the thickness c of the semiconductor chip 13, the bonding layer 12 upon the heating of the semiconductor chip 13 exhibits thermal expansion that is of relatively small significance, and thus follows the expansion and contraction of the base plate 11.
    Type: Grant
    Filed: July 4, 2016
    Date of Patent: May 14, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hisato Michikoshi, Hiroshi Notsu
  • Publication number: 20180182728
    Abstract: Inexpensive production is achieved while avoiding the degradation of electrical performance caused by the lowering of heat dissipation. The base plate 11 used here has a linear expansion coefficient of 2 to 10 ppm/K, which differs from the linear expansion coefficient of the semiconductor chip 13 by an absolute value of 7 ppm/K or smaller. The bonding layer 12 is formed such that the thickness b thereof is 50 micrometers or smaller, which is thinner than the thickness c of the semiconductor chip 13. Since the thickness b of the bonding layer 12 is thinner than the thickness c of the semiconductor chip 13, the bonding layer 12 upon the heating of the semiconductor chip 13 exhibits thermal expansion that is of relatively small significance, and thus follows the expansion and contraction of the base plate 11.
    Type: Application
    Filed: July 4, 2016
    Publication date: June 28, 2018
    Inventors: Hisato MICHIKOSHI, Hiroshi NOTSU
  • Patent number: 9087817
    Abstract: A semiconductor device includes at least one semiconductor chip, a gate wiring connected to the at least one semiconductor chip, a first wiring connected to the at least one semiconductor chip, and a second wiring connected to the at least one semiconductor chip. The first and second wirings extend along the gate wiring. The first wiring is arranged between the gate wiring and second wiring. The first wiring is the wiring closest to the gate wiring. A first part of the gate wiring opposing the first wiring is shorter than a second part of the gate wiring opposing the second wiring.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: July 21, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hisato Michikoshi, Noriyuki Hirakata, Hiroshi Notsu
  • Publication number: 20140001481
    Abstract: A semiconductor device includes at least one semiconductor chip, a gate wiring connected to the at least one semiconductor chip, a first wiring connected to the at least one semiconductor chip, and a second wiring connected to the at least one semiconductor chip. The first and second wirings extend along the gate wiring. The first wiring is arranged between the gate wiring and second wiring. The first wiring is the wiring closest to the gate wiring. A first part of the gate wiring opposing the first wiring is shorter than a second part of the gate wiring opposing the second wiring.
    Type: Application
    Filed: May 23, 2013
    Publication date: January 2, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Hisato Michikoshi, Noriyuki Hirakata, Hiroshi Notsu
  • Patent number: 5412229
    Abstract: A semiconductor light detecting device in which a housing with an optical fiber is inserted in is secured to a header with a photodiode chip mounted on integral therewith, and a light detecting surface of the photodiode chip is opposed to a light emitting surface of the optical fiber, the photodiode chip having a pn junction, the first region is surrounded by a second region of the second conductivity type formed at a portion of the semiconductor layer. The second region has the same or larger depth as or than that of the first region. Thus, even if a light is directed to the outside of the photo-sensing region, extra charges into the photo-sensing region is prevented. As a result, no optical lens system is necessary, and if an optical lens system is used, an inexpensive optical system may be used. Further, the device itself can be fabricated at low costs and easily.
    Type: Grant
    Filed: December 1, 1993
    Date of Patent: May 2, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yoshiki Kuhara, Hideaki Koseki, Hisato Michikoshi, Ichiro Tonai
  • Patent number: 5388171
    Abstract: A semiconductor laser module is used for transmitting signals by optical fiber in optoelectronic communication. The module comprises a semiconductor laser, a lens, a receptacle and a lens holder. Reflection beams at an end of a fiber must not return to the semiconductor laser. To deviate the reflection beams from the semiconductor, a key-shaped glass block is mounted in the receptacle in tight contact with the end of a fiber. Repetition of putting on and taking off ferrules contaminates the glass block. Adhesion of dust deteriorates the performance against noise induced in the laser by the return of the beam. To avoid the adhesion of dust to the surface of the transparent block, a key-shaped transparent block is inserted into an axial hole of the receptacle, separating from the block. A gap between the block and fiber prohibits dust from cohering to the block. The deviation of axes of the receptacle and lens holder is small enough. The assembly is easy.
    Type: Grant
    Filed: April 9, 1993
    Date of Patent: February 7, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hisato Michikoshi, Hiromi Nakanishi