Patents by Inventor Hisaya Fukunaga

Hisaya Fukunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7494597
    Abstract: Disclosed are a method and apparatus for etching disk-shaped members, especially a method and apparatus for etching semiconductor wafers. In a method wherein wafers (30) are rotated and etched in an etching chamber (12) which is filled with an etching solution, a non-rotating cell plate (26) is disposed between two rotating wafers (30). In an etching apparatus wherein multiple wafers (30) are supported and rotated by a rod (16), the cell plate (26) is disposed between each two wafers (30). The cell plate (26) has a surface area roughly equivalent to that of the wafer (30).
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: February 24, 2009
    Assignee: Sumco Techxiv Corporation
    Inventors: Tadamitsu Miyazaki, Kazuya Hirayama, Hisaya Fukunaga, Hiroyasu Futamura
  • Publication number: 20070017901
    Abstract: Disclosed are a method and apparatus for etching disk-shaped members, especially a method and apparatus for etching semiconductor wafers. In a method wherein wafers (30) are rotated and etched in an etching chamber (12) which is filled with an etching solution, a non-rotating cell plate (26) is disposed between two rotating wafers (30). In an etching apparatus wherein multiple wafers (30) are supported and rotated by a rod (16), the cell plate (26) is disposed between each two wafers (30). The cell plate (26) has a surface area roughly equivalent to that of the wafer (30).
    Type: Application
    Filed: July 29, 2004
    Publication date: January 25, 2007
    Applicant: KOMATSU DENSHI KINZOKU KABUSHIKI KAISHA
    Inventors: Tadamitsu Miyazaki, Kazuya Hirayama, Hisaya Fukunaga, Hiroyasu Futamura
  • Patent number: 6018884
    Abstract: An air blow apparatus peels wafers off and simultaneously removes grease and grindstone grains by blowing air into gaps formed between semiconductor wafers sliced by a wire saw from a semiconductor ingot. Two injection nozzles 1a, 1b are symmetrically mounted at predetermined positions with respect to the central line c of the semiconductor wafer 10. Air injections 11a, 11b are injected from the outer top of the semiconductor wafer 10. Injection nozzles 1a, 1b are arranged so that they are movable in the longitudinal direction of the semiconductor ingot. Air injections 11a, 11b are set to be blown out at a cone shape of about 30 degrees.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: February 1, 2000
    Assignee: Komatsu Electronic Metals Co., Ltd.
    Inventors: Hisaya Fukunaga, Katsutoshi Kurogi
  • Patent number: 5922137
    Abstract: A method of producing a semiconductor wafer in which a semiconductor wafer cut by a wire saw can be cleaned efficiently and in automatic steps and abrasive grains are substantially completely removed away, and a cleaning apparatus for the method are provided. A semiconductor ingot is cut by a wire saw into cut semiconductor wafers. Each of the cut semiconductor wafers is degrease-cleaned, the semiconductor wafer which has been degrease-cleaned is oil-water separation-cleaned, the semiconductor wafer which has been oil-water separation-cleaned is rinsed, abrasive grains are removed away from the surface of the semiconductor wafer which has been rinse-cleaned, by alkali cleaning, the semiconductor wafer which has been abrasive grain removal-cleaned is separated from a slicing plate.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: July 13, 1999
    Assignee: Komatsu Electronic Metals Co., Ltd.
    Inventors: Hisaya Fukunaga, Katsutoshi Kurogi
  • Patent number: 5908042
    Abstract: A basket for cleaning semiconductor wafers is provided which can catch semiconductor wafers or semiconductor pieces slipping off from a slicing plate so as to prevent them from dropping, and which can hold semiconductor wafers even after the wafers are separated from the slicing plate in a cleaning step.The basket for cleaning semiconductor wafers, includes:at least two upstanding side walls on which ends of a slicing plate are to be respectively placed; at least two side holding rods which are substantially horizontally disposed between side portions of the sidewalls 21, 22, the side holding rods 31, 32 being separated from each other by a distance which is slightly larger than diameters of semiconductor wafers to be housed in the basket; a bottom plate which is formed between lower portions of the side walls; and two clamping rods which are horizontally movable along the side holding rods, thereby the semiconductor wafers sliced on the slicing plate are clamped by moving the clamping rods 51, 52.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: June 1, 1999
    Assignee: Komatsu Electronic Metals Co., Ltd.
    Inventors: Hisaya Fukunaga, Katsutoshi Kurogi
  • Patent number: 5875770
    Abstract: The present invention proposes a method for cutting semiconductor ingots into sliced wafers by use of wire saws, so that the cut-out surface shape of wafers can be easily controlled by utilizing a wire-saw cutting device.The workpiece holding plate 21 is disposed in such a way that it can move along the longitudinal axis Y of the semiconductor ingot 3. The semiconductor ingot 3 is moved downward to facilitate the cutting operation by wire saw. Accordingly, the displacement along the longitudinal axis Y is made to change in response to the variation along the location of the semiconductor ingot 3.
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: March 2, 1999
    Assignee: Komatsu Electronic Metals Co., Ltd.
    Inventor: Hisaya Fukunaga
  • Patent number: 5849636
    Abstract: A method processes a semiconductor wafer by etching the wafer, which has been smoothed by rough lapping, with alkaline solution. A rod is sliced into a plurality of wafers. The peripheral edges of the wafers are chamfered. The processed strain layers over the wafers due to chamfering are smoothed and planarized. The processed strain layers are then removed by etching with alkaline solution. The etched wafers are mirror polished. Lastly, the mirror-polished wafers are cleaned.
    Type: Grant
    Filed: December 12, 1996
    Date of Patent: December 15, 1998
    Assignee: Komatsu Electronic Metals Co., Ltd.
    Inventors: Takamitsu Harada, Kouichi Imura, Hisaya Fukunaga, Masahiko Maeda