Patents by Inventor Hisayuki TARUKI
Hisayuki TARUKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11523081Abstract: A solid-state imaging device includes a plurality of pixel cells, each of the pixel cells including a light receiving element, a floating diffusion, a first source follower circuit, and a second source follower circuit. The plurality of pixel cells are connected to an output signal line. The light receiving element photoelectrically converts incident light, and stores a signal charge. The floating diffusion converts the signal charge read out of the light receiving element into a signal voltage. The first source follower circuit is connected to the floating diffusion, and outputs an output voltage corresponding to the signal voltage. The second source follower circuit is connected in series with the first source follower circuit, and outputs a pixel signal corresponding to the output voltage.Type: GrantFiled: August 26, 2020Date of Patent: December 6, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Hisayuki Taruki
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Patent number: 11362129Abstract: A solid-state imaging device of an embodiment includes plural first transfer gate electrodes, plural second transfer gate electrodes, and plural fixed gate electrodes. The first transfer gate electrodes are such that the respective first transfer gate electrodes are placed in a charge transfer unit to correspond to single light receiving sections, and a control signal ?1 is applied. The second transfer gate electrodes are such that the respective second transfer gate electrodes are placed in a charge transfer unit to correspond to the single light receiving sections, and a control signal ?2 that differs in phase from the control signal ?1 for transferring plural charges is applied. The respective fixed gate electrodes are such that the respective fixed gate electrodes are placed between the first and the second transfer gate electrodes corresponding to the single light receiving sections in the charge transfer unit, and a fixed voltage is applied.Type: GrantFiled: September 5, 2019Date of Patent: June 14, 2022Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Hisayuki Taruki, Yutaka Okada
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Publication number: 20210297624Abstract: A solid-state imaging device includes a plurality of pixel cells, each of the pixel cells including a light receiving element, a floating diffusion, a first source follower circuit, and a second source follower circuit. The plurality of pixel cells are connected to an output signal line. The light receiving element photoelectrically converts incident light, and stores a signal charge. The floating diffusion converts the signal charge read out of the light receiving element into a signal voltage. The first source follower circuit is connected to the floating diffusion, and outputs an output voltage corresponding to the signal voltage. The second source follower circuit is connected in series with the first source follower circuit, and outputs a pixel signal corresponding to the output voltage.Type: ApplicationFiled: August 26, 2020Publication date: September 23, 2021Inventor: Hisayuki Taruki
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Publication number: 20200273903Abstract: A solid-state imaging device of an embodiment includes plural first transfer gate electrodes, plural second transfer gate electrodes, and plural fixed gate electrodes. The first transfer gate electrodes are such that the respective first transfer gate electrodes are placed in a charge transfer unit to correspond to single light receiving sections, and a control signal ?1 is applied. The second transfer gate electrodes are such that the respective second transfer gate electrodes are placed in a charge transfer unit to correspond to the single light receiving sections, and a control signal ?2 that differs in phase from the control signal ?1 for transferring plural charges is applied. The respective fixed gate electrodes are such that the respective fixed gate electrodes are placed between the first and the second transfer gate electrodes corresponding to the single light receiving sections in the charge transfer unit, and a fixed voltage is applied.Type: ApplicationFiled: September 5, 2019Publication date: August 27, 2020Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Hisayuki Taruki, Yutaka Okada
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Patent number: 9312296Abstract: A solid-state imaging device according to an embodiment includes photoelectric conversion devices, a dopant layer, a low concentration region, and a transistor. The photoelectric conversion devices are disposed on a semiconductor layer. The dopant layer is disposed on a layer same as the semiconductor layer where photoelectric conversion devices are arrayed, and includes dopant having a conductivity type reverse to a charge accumulating region of the photoelectric conversion device. The low concentration region is disposed inside the dopant layer and has dopant concentration lower than the dopant layer. A transistor includes an active region disposed on the dopant layer.Type: GrantFiled: September 11, 2014Date of Patent: April 12, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Hisayuki Taruki, Nagataka Tanaka
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Patent number: 9300886Abstract: According to one embodiment, a solid-state imaging device includes unit cells including a photoelectric conversion element, a signal detector and the amplifier transistor, respectively; a vertical signal line supplied with a reset signal and a pixel signal of the cell; a first interconnect connected to the signal detectors via a capacitance element; a second interconnect connected between the signal detectors and the amplifier transistors; and a switch element between the vertical signal line and the first interconnects. Unit cells arranged in a column direction is connected to a common vertical line and a common first interconnect.Type: GrantFiled: March 7, 2014Date of Patent: March 29, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Hirofumi Yamashita, Hisayuki Taruki
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Publication number: 20150115338Abstract: A solid-state imaging device according to an embodiment includes photoelectric conversion devices, a dopant layer, a low concentration region, and a transistor. The photoelectric conversion devices are disposed on a semiconductor layer. The dopant layer is disposed on a layer same as the semiconductor layer where photoelectric conversion devices are arrayed, and includes dopant having a conductivity type reverse to a charge accumulating region of the photoelectric conversion device. The low concentration region is disposed inside the dopant layer and has dopant concentration lower than the dopant layer. A transistor includes an active region disposed on the dopant layer.Type: ApplicationFiled: September 11, 2014Publication date: April 30, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Hisayuki TARUKI, Nagataka TANAKA
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Publication number: 20150077611Abstract: According to one embodiment, a solid-state imaging device includes unit cells including a photoelectric conversion element, a signal detector and the amplifier transistor, respectively; a vertical signal line supplied with a reset signal and a pixel signal of the cell; a first interconnect connected to the signal detectors via a capacitance element; a second interconnect connected between the signal detectors and the amplifier transistors; and a switch element between the vertical signal line and the first interconnects. Unit cells arranged in a column direction is connected to a common vertical line and a common first interconnect.Type: ApplicationFiled: March 7, 2014Publication date: March 19, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hirofumi YAMASHITA, Hisayuki TARUKI
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Patent number: 8446504Abstract: According to one embodiment, the pixel driving circuit causes the amplifying transistor to form a source follower circuit without applying a bias voltage to the vertical signal line and connects the FD to the power source. Thereafter, the pixel driving circuit separates the current source from the vertical signal line to cancel the source follower circuit, applies a bias voltage to the vertical signal line so that the voltage of the FD is raised when the brightness of the subject is higher than the reference value, and the voltage of the FD is lowered when the brightness of the subject is lower than the reference value, and turns on the read transistor. The pixel driving circuit turns off the read transistor, and then connects the current source to the vertical signal line, and causes the amplifying transistor to form the source follower circuit.Type: GrantFiled: March 21, 2011Date of Patent: May 21, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Hisayuki Taruki, Nagataka Tanaka
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Publication number: 20110234871Abstract: According to one embodiment, the pixel driving circuit causes the amplifying transistor to form a source follower circuit without applying a bias voltage to the vertical signal line and connects the FD to the power source. Thereafter, the pixel driving circuit separates the current source from the vertical signal line to cancel the source follower circuit, applies a bias voltage to the vertical signal line so that the voltage of the FD is raised when the brightness of the subject is higher than the reference value, and the voltage of the FD is lowered when the brightness of the subject is lower than the reference value, and turns on the read transistor. The pixel driving circuit turns off the read transistor, and then connects the current source to the vertical signal line, and causes the amplifying transistor to form the source follower circuit.Type: ApplicationFiled: March 21, 2011Publication date: September 29, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Hisayuki TARUKI, Nagataka Tanaka
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Publication number: 20110128426Abstract: A solid-state imaging apparatus according to an embodiment includes pixels, horizontal control lines, vertical signal lines, a vertical scan circuit and a signal processing circuit; the horizontal control lines selecting the pixels in the row direction, the vertical signal lines having n lines (n is integer of 2 or larger) thereof arranged for each column so as to mutually intersect and being connected separately to pixels divided into n groups for each column, the vertical scan circuit selecting the horizontal control lines, and signal processing circuit processing pixel signals read out via the vertical signal lines simultaneously.Type: ApplicationFiled: September 20, 2010Publication date: June 2, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Hisayuki Taruki, Nagataka Tanaka
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Publication number: 20110001860Abstract: According to one embodiment, a solid-state imaging device includes a solid-state imaging device includes a pixel array, load transistor, first switch transistor, and second switch transistor. The pixel array includes a plurality of unit pixels arranged in a matrix. Each unit pixel includes a photodiode, a read transistor, a reset transistor to which one of a first voltage and a second voltage, and an amplification transistor. The second switch transistor outputs a bias voltage to the vertical signal line.Type: ApplicationFiled: June 30, 2010Publication date: January 6, 2011Inventors: Hisayuki TARUKI, Nagataka Tanaka