Patents by Inventor Hisayuki TARUKI

Hisayuki TARUKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11523081
    Abstract: A solid-state imaging device includes a plurality of pixel cells, each of the pixel cells including a light receiving element, a floating diffusion, a first source follower circuit, and a second source follower circuit. The plurality of pixel cells are connected to an output signal line. The light receiving element photoelectrically converts incident light, and stores a signal charge. The floating diffusion converts the signal charge read out of the light receiving element into a signal voltage. The first source follower circuit is connected to the floating diffusion, and outputs an output voltage corresponding to the signal voltage. The second source follower circuit is connected in series with the first source follower circuit, and outputs a pixel signal corresponding to the output voltage.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: December 6, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Hisayuki Taruki
  • Patent number: 11362129
    Abstract: A solid-state imaging device of an embodiment includes plural first transfer gate electrodes, plural second transfer gate electrodes, and plural fixed gate electrodes. The first transfer gate electrodes are such that the respective first transfer gate electrodes are placed in a charge transfer unit to correspond to single light receiving sections, and a control signal ?1 is applied. The second transfer gate electrodes are such that the respective second transfer gate electrodes are placed in a charge transfer unit to correspond to the single light receiving sections, and a control signal ?2 that differs in phase from the control signal ?1 for transferring plural charges is applied. The respective fixed gate electrodes are such that the respective fixed gate electrodes are placed between the first and the second transfer gate electrodes corresponding to the single light receiving sections in the charge transfer unit, and a fixed voltage is applied.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: June 14, 2022
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hisayuki Taruki, Yutaka Okada
  • Publication number: 20210297624
    Abstract: A solid-state imaging device includes a plurality of pixel cells, each of the pixel cells including a light receiving element, a floating diffusion, a first source follower circuit, and a second source follower circuit. The plurality of pixel cells are connected to an output signal line. The light receiving element photoelectrically converts incident light, and stores a signal charge. The floating diffusion converts the signal charge read out of the light receiving element into a signal voltage. The first source follower circuit is connected to the floating diffusion, and outputs an output voltage corresponding to the signal voltage. The second source follower circuit is connected in series with the first source follower circuit, and outputs a pixel signal corresponding to the output voltage.
    Type: Application
    Filed: August 26, 2020
    Publication date: September 23, 2021
    Inventor: Hisayuki Taruki
  • Publication number: 20200273903
    Abstract: A solid-state imaging device of an embodiment includes plural first transfer gate electrodes, plural second transfer gate electrodes, and plural fixed gate electrodes. The first transfer gate electrodes are such that the respective first transfer gate electrodes are placed in a charge transfer unit to correspond to single light receiving sections, and a control signal ?1 is applied. The second transfer gate electrodes are such that the respective second transfer gate electrodes are placed in a charge transfer unit to correspond to the single light receiving sections, and a control signal ?2 that differs in phase from the control signal ?1 for transferring plural charges is applied. The respective fixed gate electrodes are such that the respective fixed gate electrodes are placed between the first and the second transfer gate electrodes corresponding to the single light receiving sections in the charge transfer unit, and a fixed voltage is applied.
    Type: Application
    Filed: September 5, 2019
    Publication date: August 27, 2020
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hisayuki Taruki, Yutaka Okada
  • Patent number: 9312296
    Abstract: A solid-state imaging device according to an embodiment includes photoelectric conversion devices, a dopant layer, a low concentration region, and a transistor. The photoelectric conversion devices are disposed on a semiconductor layer. The dopant layer is disposed on a layer same as the semiconductor layer where photoelectric conversion devices are arrayed, and includes dopant having a conductivity type reverse to a charge accumulating region of the photoelectric conversion device. The low concentration region is disposed inside the dopant layer and has dopant concentration lower than the dopant layer. A transistor includes an active region disposed on the dopant layer.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: April 12, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisayuki Taruki, Nagataka Tanaka
  • Patent number: 9300886
    Abstract: According to one embodiment, a solid-state imaging device includes unit cells including a photoelectric conversion element, a signal detector and the amplifier transistor, respectively; a vertical signal line supplied with a reset signal and a pixel signal of the cell; a first interconnect connected to the signal detectors via a capacitance element; a second interconnect connected between the signal detectors and the amplifier transistors; and a switch element between the vertical signal line and the first interconnects. Unit cells arranged in a column direction is connected to a common vertical line and a common first interconnect.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: March 29, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hirofumi Yamashita, Hisayuki Taruki
  • Publication number: 20150115338
    Abstract: A solid-state imaging device according to an embodiment includes photoelectric conversion devices, a dopant layer, a low concentration region, and a transistor. The photoelectric conversion devices are disposed on a semiconductor layer. The dopant layer is disposed on a layer same as the semiconductor layer where photoelectric conversion devices are arrayed, and includes dopant having a conductivity type reverse to a charge accumulating region of the photoelectric conversion device. The low concentration region is disposed inside the dopant layer and has dopant concentration lower than the dopant layer. A transistor includes an active region disposed on the dopant layer.
    Type: Application
    Filed: September 11, 2014
    Publication date: April 30, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hisayuki TARUKI, Nagataka TANAKA
  • Publication number: 20150077611
    Abstract: According to one embodiment, a solid-state imaging device includes unit cells including a photoelectric conversion element, a signal detector and the amplifier transistor, respectively; a vertical signal line supplied with a reset signal and a pixel signal of the cell; a first interconnect connected to the signal detectors via a capacitance element; a second interconnect connected between the signal detectors and the amplifier transistors; and a switch element between the vertical signal line and the first interconnects. Unit cells arranged in a column direction is connected to a common vertical line and a common first interconnect.
    Type: Application
    Filed: March 7, 2014
    Publication date: March 19, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hirofumi YAMASHITA, Hisayuki TARUKI
  • Patent number: 8446504
    Abstract: According to one embodiment, the pixel driving circuit causes the amplifying transistor to form a source follower circuit without applying a bias voltage to the vertical signal line and connects the FD to the power source. Thereafter, the pixel driving circuit separates the current source from the vertical signal line to cancel the source follower circuit, applies a bias voltage to the vertical signal line so that the voltage of the FD is raised when the brightness of the subject is higher than the reference value, and the voltage of the FD is lowered when the brightness of the subject is lower than the reference value, and turns on the read transistor. The pixel driving circuit turns off the read transistor, and then connects the current source to the vertical signal line, and causes the amplifying transistor to form the source follower circuit.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: May 21, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisayuki Taruki, Nagataka Tanaka
  • Publication number: 20110234871
    Abstract: According to one embodiment, the pixel driving circuit causes the amplifying transistor to form a source follower circuit without applying a bias voltage to the vertical signal line and connects the FD to the power source. Thereafter, the pixel driving circuit separates the current source from the vertical signal line to cancel the source follower circuit, applies a bias voltage to the vertical signal line so that the voltage of the FD is raised when the brightness of the subject is higher than the reference value, and the voltage of the FD is lowered when the brightness of the subject is lower than the reference value, and turns on the read transistor. The pixel driving circuit turns off the read transistor, and then connects the current source to the vertical signal line, and causes the amplifying transistor to form the source follower circuit.
    Type: Application
    Filed: March 21, 2011
    Publication date: September 29, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hisayuki TARUKI, Nagataka Tanaka
  • Publication number: 20110128426
    Abstract: A solid-state imaging apparatus according to an embodiment includes pixels, horizontal control lines, vertical signal lines, a vertical scan circuit and a signal processing circuit; the horizontal control lines selecting the pixels in the row direction, the vertical signal lines having n lines (n is integer of 2 or larger) thereof arranged for each column so as to mutually intersect and being connected separately to pixels divided into n groups for each column, the vertical scan circuit selecting the horizontal control lines, and signal processing circuit processing pixel signals read out via the vertical signal lines simultaneously.
    Type: Application
    Filed: September 20, 2010
    Publication date: June 2, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hisayuki Taruki, Nagataka Tanaka
  • Publication number: 20110001860
    Abstract: According to one embodiment, a solid-state imaging device includes a solid-state imaging device includes a pixel array, load transistor, first switch transistor, and second switch transistor. The pixel array includes a plurality of unit pixels arranged in a matrix. Each unit pixel includes a photodiode, a read transistor, a reset transistor to which one of a first voltage and a second voltage, and an amplification transistor. The second switch transistor outputs a bias voltage to the vertical signal line.
    Type: Application
    Filed: June 30, 2010
    Publication date: January 6, 2011
    Inventors: Hisayuki TARUKI, Nagataka Tanaka