Patents by Inventor Hitesh Gupta

Hitesh Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11941334
    Abstract: Embodiments include herein are directed towards a system and method for intelligent intent recognition based electronic design. Embodiments may include receiving, using a processor, a natural language input from a user at an intent recognition model. Embodiments may also include performing intent recognition on the natural language input at the intent recognition model and providing an output from the intent recognition model to a command generator. Embodiments may further include generating a command based upon, at least in part, the output and executing the command at a target tool environment.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: March 26, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventors: Deepak Gupta, Hitesh Mohan Kumar, Yatinder Singh
  • Publication number: 20240089136
    Abstract: Methods, computer systems, and computer-storage media, and graphical user interfaces are provided for facilitating efficient meeting management, according to embodiments of the present technology. In one embodiment, engagement data associated with an attendee of an online meeting is obtained. Thereafter, an engagement metric is generated using the engagement data, the engagement metric indicating an extent of engagement of the attendee to the online meeting. Based on the engagement metric indicating that the extent of engagement of the attendee to the online meeting falls below an engagement threshold, a request is provided to disconnect or throttle an audio and/or video stream of the online meeting to and/or from an attendee device associated with the attendee of the online meeting. Efficient meeting management may also be performed by clustering related messages.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Inventors: Pranavasthitha TANDRA, Hitesh Kumar JHAMB, Vikram GUPTA, Arvind Kumar SINGH, Anubhuti ARUN, Ashutosh TRIPATHI, Kausik GHATAK, Aman RASTOGI
  • Publication number: 20180144740
    Abstract: Systems and methods for locating the end of a keyword in voice sensing are provided. An example method includes receiving an acoustic signal that includes a keyword portion immediately followed by a query portion. The acoustic signal represents at least one captured sound. The method further includes determining the end of the keyword portion. The method further includes, separating, using the end of the keyword portion, the query portion from the keyword portion of the acoustic signal. The method further includes providing the query portion, absent any part of the keyword portion, to an automatic speech recognition (ASR) system.
    Type: Application
    Filed: November 9, 2017
    Publication date: May 24, 2018
    Applicant: Knowles Electronics, LLC
    Inventors: Jean Laroche, Sridhar Nemala, Sundararajan Srinivasan, Hitesh Gupta
  • Patent number: 9001593
    Abstract: A memory array includes a number of word lines, with each word line coupled to a word line driver for memory write operations and a word line driver for memory read operations. A decode stage includes write logic for each word line and read logic for each word line. A word line driver stage includes a write word line driver and a read word line driver. The write logic for at least one world line is configured to enable the write word line driver for a memory write operation of the word line while prohibiting the read word line logic from enabling the read word line driver for a memory read operation of the word line.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: April 7, 2015
    Assignee: Apple Inc.
    Inventors: Hitesh Gupta, Greg M Hess, Aravind Kandala
  • Publication number: 20140177346
    Abstract: A memory array includes a number of word lines, with each word line coupled to a word line driver for memory write operations and a word line driver for memory read operations. A decode stage includes write logic for each word line and read logic for each word line. A word line driver stage includes a write word line driver and a read word line driver. The write logic for at least one world line is configured to enable the write word line driver for a memory write operation of the word line while prohibiting the read word line logic from enabling the read word line driver for a memory read operation of the word line.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Applicant: APPLE INC.
    Inventors: Hitesh Gupta, Greg M. Hess, Aravind Kandala