Patents by Inventor Hitoshi Habuka

Hitoshi Habuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210285100
    Abstract: A method for effectively removing fluorine atoms remaining in a semiconductor fabrication chamber after cleaning the chamber with chlorine trifluoride is provided. The method includes exposing the inside of the chamber after semiconductor fabrication to chlorine trifluoride to remove an object to be removed remaining in the chamber and then thermally treating the inside of the chamber with at least one gas selected from the group consisting of nitrogen, argon, helium, and hydrogen. It is preferred that the exposure to chlorine trifluoride is carried out while monitoring the chamber inside temperature and that the chlorine trifluoride feed is ceased when the inside temperature decreases to a predetermined temperature.
    Type: Application
    Filed: August 29, 2017
    Publication date: September 16, 2021
    Inventors: Hitoshi HABUKA, Yoshinao TAKAHASHI, Katsuya FUKAE
  • Patent number: 9777375
    Abstract: Provide a converging mirror-based furnace for heating a target by way of reflecting from a reflecting mirror unit the light emitted from a light source and then irradiating a target with the reflected light, wherein said target-heating converging-light furnace is such that: the reflecting mirror unit comprises a primary reflecting mirror and secondary reflecting mirror; the light emitted from the light source is reflected sequentially by the primary reflecting mirror and secondary reflecting mirror and then irradiated onto the target; and the light reflected by the secondary reflecting mirror and irradiated onto the target surface is not perpendicular to the target surface. Based on the above, a system that uses converged infrared light to provide heating can be made smaller while keeping its heating performance intact, even when the system uses a revolving ellipsoid.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: October 3, 2017
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Shinichi Ikeda, Shiro Hara, Takanori Mikahara, Hitoshi Habuka, Sommawan Khumpuang
  • Publication number: 20140338591
    Abstract: Provide a converging mirror-based furnace for heating a target by way of reflecting from a reflecting mirror unit the light emitted from a light source and then irradiating a target with the reflected light, wherein said target-heating converging-light furnace is such that: the reflecting mirror unit comprises a primary reflecting mirror and secondary reflecting mirror; the light emitted from the light source is reflected sequentially by the primary reflecting mirror and secondary reflecting mirror and then irradiated onto the target; and the light reflected by the secondary reflecting mirror and irradiated onto the target surface is not perpendicular to the target surface. Based on the above, a system that uses converged infrared light to provide heating can be made smaller while keeping its heating performance intact, even when the system uses a revolving ellipsoid.
    Type: Application
    Filed: November 30, 2012
    Publication date: November 20, 2014
    Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Shinichi Ikeda, Shiro Hara, Takanori Mikahara, Hitoshi Habuka, Sommawan Khumpuang
  • Patent number: 6569239
    Abstract: A surface roughness distribution in the surface of a silicon epitaxial wafer is made uniform by optimizing a temperature distribution in the surface of a susceptor used in a vapor phase thin film growth apparatus. The susceptor is not supported by its center of the rear surface thereof, but only the peripheral portion thereof is supported using vertical pins respectively provided at the far ends of spokes radially branched from a rotary shaft. The susceptor is constituted so that a difference in temperature between the maximum and minimum in the surface of a silicon wafer is suppressed to a value equal to or less than 7° C. Hence, a surface roughness distribution in the surface of the silicon epitaxial wafer can be suppressed to a value equal to or less than 0.02 ppm.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: May 27, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Takeshi Arai, Tadaaki Honma, Hitoshi Habuka
  • Publication number: 20010039917
    Abstract: A surface roughness distribution in the surface of a silicon epitaxial wafer is made uniform by optimizing a temperature distribution in the surface of a susceptor used in a vapor phase thin film growth apparatus. The susceptor is not supported by its center of the rear surface thereof, but only the peripheral portion thereof is supported using vertical pins respectively provided at the far ends of spokes radially branched from a rotary shaft. The susceptor is constituted so that a difference in temperature between the maximum and minimum in the surface of a silicon wafer is suppressed to a value equal to or less than 7° C. Hence, a surface roughness distribution in the surface of the silicon epitaxial wafer can be suppressed to a value equal to or less than 0.02 ppm.
    Type: Application
    Filed: July 10, 2001
    Publication date: November 15, 2001
    Applicant: Shin-Etsu Handotai, Co., Ltd.
    Inventors: Takeshi Arai, Tadaaki Honma, Hitoshi Habuka
  • Patent number: 6309458
    Abstract: This invention provides a method for fabricating a silicon thin film which is high in supply efficiency of silicon material. In the method for fabricating a silicon thin film by placing a silicon semiconductor single crystal substrate in a process vessel and by supplying a silicon material into the process vessel, a wall of the process vessel is cooled so that silicon tetrachloride (SiCl4) concentration in an exhaust gas discharged from the process vessel during a growth process of a silicon thin film becomes equal to or lower than {fraction (1/10)} of a concentration of the silicon material in the exhaust gas. Also, the wall of the process vessel is cooled so that temperature gradient between a surface of the semiconductor single crystal substrate and the wall of the process vessel satisfies the following Equation (1) in relation to a temperature of the semiconductor single crystal substrate: temperature gradient(K/cm)≧0.3×substrate temperature(K)−90  (1).
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: October 30, 2001
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Hitoshi Habuka, Shoji Akiyama, Toru Otsuka
  • Patent number: 6254933
    Abstract: A method of performing chemical vapor deposition which produces semiconductor crystalline thin films having small transition widths. The method involves the use of a cold-wall type reaction chamber that is equipped with a gas inlet at one end and a gas outlet at the other end and a semiconductor substrate support which supports a semiconductor substrate so that a main surface thereof is horizontal. A reactant gas is caused to flow horizontally through the reaction chamber to effect the growing of a crystalline thin film on the main surface of the semiconductor substrate. The semiconductor substrate is arranged within the reactor chamber within a distance W which is measured from a leading edge of the semiconductor substrate at a most upstream position along a direction toward the gas outlet where W indicates an internal width of the reaction chamber.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: July 3, 2001
    Assignee: Shin-Etsu Handotai, Ltd.
    Inventors: Hitoshi Habuka, Masanori Mayuzumi, Naoto Tate, Masatake Katayama
  • Patent number: 6245647
    Abstract: The invention provides a method for forming a thin film uniform in resistivity distribution on a semiconductor substrate. The temperature of the inside wall (6) of the reaction vessel (2) of vapor phase growth equipment is controlled to below the thermal decomposition temperature of a dopant gas such as diborane, for example, to within a range of room temperature to 250° C. The region of this temperature range is defined so as to range from the upstream-side end of the semiconductor substrate (1) to at least an upstream-side {fraction (1/3 )} point of the substrate diameter along the direction of flow of the dopant gas supplied from one end of the reaction vessel (2), desirably, over the entire region just above the semiconductor substrate (1).
    Type: Grant
    Filed: February 22, 1999
    Date of Patent: June 12, 2001
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Shoji Akiyama, Toru Otsuka, Hitoshi Habuka
  • Patent number: 6238478
    Abstract: A first layer having a same conductivity and a substantially identical concentration as a CZ substrate having a high impurity concentration is formed by a vapor phase growth process on the substrate directly, a pressure is changed to purge an atmosphere, and then a second layer having a same conductivity as the substrate and having a lower concentration by 3 or more orders of magnitude than the substrate is formed by the vapor phase growth process. Thereby there is simply and inexpensively formed a silicon single crystal thin film by the vapor phase growth process which film has no crystal defective layer and has a dopant concentration abruptly changing at an interface between the film and a high concentration layer.
    Type: Grant
    Filed: September 8, 1998
    Date of Patent: May 29, 2001
    Assignee: Shin-Etsu Handotai, Co., Ltd.
    Inventor: Hitoshi Habuka
  • Publication number: 20010001384
    Abstract: A surface roughness distribution in the surface of a silicon epitaxial wafer is made uniform by optimizing a temperature distribution in the surface of a susceptor used in a vapor phase thin film growth apparatus. The susceptor is not supported by its center of the rear surface thereof, but only the peripheral portion thereof is supported using vertical pins respectively provided at the far ends of spokes radially branched from a rotary shaft. The susceptor is constituted so that a difference in temperature between the maximum and minimum in the surface of a silicon wafer is suppressed to a value equal to or less than 7° C. Hence, a surface roughness distribution in the surface of the silicon epitaxial wafer can be suppressed to a value equal to or less than 0.02 ppm.
    Type: Application
    Filed: July 26, 1999
    Publication date: May 24, 2001
    Inventors: TAKESHI ARAI, TADAAKI HONMA, HITOSHI HABUKA
  • Patent number: 6235645
    Abstract: An object of the invention is to remove organic materials and metal impurities on a silicon-based semiconductor substrate while preventing regrowth of a natural oxide film and thermal diffusion of the metal impurities from occurring. In order to achieve the object, H2 gas that can maintain a reductive atmosphere is consistently used, as a carrier gas, through a whole process, the organic materials in attachment is decomposed by HF gas and the metal impurities are transformed into metal chlorides by HCl gas. In any of treatments, since products whose vapor pressures are higher than those of respective starting materials are obtained, the products are respectively vaporized in a H2 gas atmosphere at higher temperatures than those at which the decomposition and the transformation are performed. The whole process can be performed in a low temperature range whose upper limit is 1000° C. or lower.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: May 22, 2001
    Assignee: Shin Etsu Handotai Co., Ltd.
    Inventors: Hitoshi Habuka, Toru Otsuka
  • Patent number: 6194691
    Abstract: This invention provides a method of manufacturing a wafer heating furnace having a desired heating distribution with less trials and errors by predicting heating distributions in the process of designing the heating furnace.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: February 27, 2001
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Hitoshi Habuka, Toru Otsuka
  • Patent number: 6124209
    Abstract: The surface of a silicon single crystal substrate 2 is exposed to a mixed gas of hydrogen fluoride gas and hydrogen gas at 0.degree. C.-100.degree. C. to remove a natural oxide film 3 formed on the surface of silicon single crystal substrate 2. The method, as a pre-treatment to the formation of a silicon single crystal thin film, gives a smooth surface with a low temperature treatment and without causing the out-diffusion of the dopants or the auto-doping phenomenon.
    Type: Grant
    Filed: December 10, 1997
    Date of Patent: September 26, 2000
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Hitoshi Habuka, Toru Otsuka
  • Patent number: 6072164
    Abstract: There is provided a heat-treating method and a radiant heating device by which an object to be heat-treated can be heat-treated at an actually desired temperature regardless of the dopant concentration or resistivity of the object at the time of heat-treating the object with a radiant heating device using a radiation thermometer as a temperature detector. In the method, the object is heat-treated at an actually desired temperature by correcting the temperature of the object in accordance with the dopant concentration or resistivity of the object. In the apparatus, the dopant concentration or resistivity of the object is inputted in advance to a temperature controller and the controller calculates an actual temperature of the object by correcting and computing the temperature of the object detected with the radiation thermometer in accordance with the dopant concentration or resistivity of the object and controls the temperature of the object based on the calculated temperature value.
    Type: Grant
    Filed: September 11, 1998
    Date of Patent: June 6, 2000
    Assignee: Shin-Estu Handotai Co., Ltd.
    Inventors: Naoto Tate, Tomoyuki Sakai, Naohisa Toda, Hitoshi Habuka
  • Patent number: 6048793
    Abstract: In a method and an appratus for a thin film growth on a semiconductor crystal substrate, impurities and contaminants absorbed on the inside wall of the reaction vessel are very harmful because these impurities and contaminants will deteriorate the quality of the thin film. A method and an apparatus by which the quantity of these impurities and contaminants absorbed on the inside wall of the reaction vessel can be restrained and removed easily are disclosed in this invention, wherein a semiconductor crystal substrate is mounted in the reaction vessel, and the wall of the reation vessel is cooled forcibly by a coolant while the substrate is under heating procedure to grow a thin film on the substrate by supplying the raw material gas into the reaction vessel. And the temperature of the wall of the reaction vessel during the procedure except the thin film growth is kept higher temperature than the temprature of the wall of the reaction vessel during the thin film growth procedure.
    Type: Grant
    Filed: October 23, 1995
    Date of Patent: April 11, 2000
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Hitoshi Habuka, Masanori Mayuzumi, Naoto Tate, Masatake Katayama
  • Patent number: 6008128
    Abstract: A method for microscopically smoothing a surface of a wafer made of silicon single crystal having a low resistivity. In the method, a native oxide film grown on a surface of a wafer having polished by an ordinary mirror polishing process is removed at a temperature of less than 100.degree. C. with use of a mixture gas of HF and H.sub.2, and then an organic substance deposited thereon is removed at a temperature of less than 800.degree. C. with use of a mixture gas of HCl and H.sub.2. Re-growth of an oxide film is suppressed in a consistent H.sub.2 atmosphere, during which the wafer is substantially not varied in its surface roughness. Then the wafer is thermally treated in an H.sub.2 gas atmosphere at a temperature of not less than 800.degree. C. and less than 1000.degree. C.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: December 28, 1999
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Hitoshi Habuka, Toru Otsuka, Masatake Katayama
  • Patent number: 5993557
    Abstract: An apparatus for growing a high-quality single-crystalline semiconductor film on a substrate based on vapor phase growth while rotating the substrate and preventing micro-particles generated by a rotary drive unit from adhering onto the major plane of the substrate. The substrate 2 set inside the reaction chamber 21 is rotated using the rotary drive unit 7, a reaction gas 10 is fed to the major plane side of the substrate 2, a purge gas 3a is fed to the back space of the substrate in the reaction to chamber 21 to replace a space 11a with a carrier gas atmosphere, where the rotary drive unit 7 is located in the purge gas discharge section 13, a purge gas discharge duct 12 connected to the purge gas discharge section, and further to the purge gas discharge duct 12 is connected a gas flow controller 8, and serially in the downstream side thereof is connected an evacuation pump 9.
    Type: Grant
    Filed: September 15, 1998
    Date of Patent: November 30, 1999
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Munenori Tomita, Masanori Mayuzumi, Hitoshi Habuka
  • Patent number: 5938840
    Abstract: In the formation of a thin film on the surface of a semiconductor crystal substrate by using a horizontal type vapor phase growth apparatus, the distribution of the thickness and resistivity of the thin film can be properly obtained by adjusting the concentration distribution of the raw material gas in the mixture gas in the width direction of the reaction vessel over the substrate surface. And in the reaction vessel, carrier gas is supplied from the position close to the transfer port of the substrate, and raw material gas is supplied from the position located in the downstream side of a vortex generation region caused by the flow of the carrier gas.
    Type: Grant
    Filed: March 9, 1998
    Date of Patent: August 17, 1999
    Assignee: Shin-Etsu Handotai, Co., Ltd
    Inventors: Hitoshi Habuka, Masanori Mayuzumi, Naoto Tate, Masatake Katayama
  • Patent number: 5913974
    Abstract: A heat treating method in which the ultimate temperature of semiconductor single crystal substrates being heat treated is made constant. The method includes heating at least the back surface of the substrate directly with radiant heat. The heating output is controlled according to the reflectivity of the back surfaces of the semiconductor single crystal substrates. In particular, the heating output is increased or decreased in proportion to the increase or decrease in the reflectivity of the back surface of the substrates from one substrate to the next. The method makes its possible to keep a uniform crystal quality throughout the heat treated semiconductor single crystal substrates.
    Type: Grant
    Filed: October 29, 1997
    Date of Patent: June 22, 1999
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventor: Hitoshi Habuka
  • Patent number: 5885346
    Abstract: Organic protective film 4 is directly adhered on the surface of silicon semiconductor crystal 1. Silicon semiconductor crystal 1 with organic protective film 4 is prepared by adhering organic protective film 4 on the surface of silicon semiconductor crystal substrate 1 on which oxide film 8 is formed, removing oxide film 8 to directly adhere organic protective film 4 on the surface of silicon semiconductor crystal 1, removing organic protective film 4 and then treating silicon semiconductor crystal 1.
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: March 23, 1999
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Hitoshi Habuka, Toru Otsuka