Abstract: An image forming apparatus includes a shutter spring engaging with a cover at one end while engaging with a shutter at another end, configured to urge the shutter for a closed state from an open state, a buffer plate supported in a rotatable manner, configured to push the shutter for the open state from the closed state, and a buffer spring held between the buffer plate and the shutter, configured to urge the buffer plate in a direction separating from the shutter. In the image forming apparatus, elastic force of the buffer spring is greater than elastic force of the shutter spring, the buffer plate presses the shutter via the buffer spring, and a length of the buffer spring is greater than a solid height of the buffer spring when the shutter is pushed by the buffer plate to be moved to a position of the open state.

Abstract: A semiconductor memory device includes a memory cell transistor and a word line connected a gate of the memory cell transistor. A first erase voltage is applied to the memory cell transistor when an erasing operation of a first type is performed on the memory cell transistor, and a second erase voltage, lower than the first erase voltage, is applied to the memory cell transistor when an erasing operation of a second type is performed on the memory cell transistor.

Abstract: A control circuit is configured to execute an erasing operation on a selected cell unit in a selected memory block. In the erasing operation, the control circuit raises the voltage of the bodies of the first memory transistors included in the selected cell unit to a first voltage, sets the voltage of the bodies of the first memory transistors included in the non-selected cell unit to a second voltage lower than the first voltage, and applies a third voltage equal to or lower than the second voltage to the gates of the first memory transistors included in the selected cell unit and the non-selected cell unit.

Abstract: A seal member is injection-molded with a simple structure that needs no complicated assembling process. An optical scanning device 21 includes a light source unit 202 from which a light beam is emitted; a rotating polygon mirror 203 that deflects the light beam such that the light beam emitted from the light source unit 202 is scanned over a photosensitive member; an optical component that directs the light beam deflected by the rotating polygon mirror 203 onto the photosensitive member; an optical housing 20 that contains the light source unit 202, the rotating polygon mirror 203, and the optical component; and a cover 30 that covers an opening of the optical housing 20.

Abstract: A nonvolatile semiconductor memory device comprises a plurality of memory blocks, each including a plurality of cell units and each configured as a unit of execution of an erase operation. Each of the cell units comprises a memory string, a first transistor, a second transistor, and a diode. The first transistor has one end connected to one end of the memory string. The second transistor is provided between the other end of the memory string and a second line. The diode is provided between the other end of the first transistor and a first line. The diode comprises a second semiconductor layer of a first conductivity type and a third semiconductor layer of a second conductivity type.

Abstract: A memory device of an embodiment includes a memory cell array and a controller. In the memory cell, data is written per page unit and is erased per block which is a multiple the page unit of a natural number of two or more. The block includes memory strings, each including memory cells capable of storing data of one or more bits with a threshold voltage indicative of an erase state in which data is erased and one or more threshold voltages which are higher than the voltage indicative of the erase state and indicate written states in which data is written. The controller selects one of adjustment values of positive and negative values based on data read from a first memory cell of the memory cells, and reads data from a second memory cell of the memory cells using the selected adjustment value and a first read voltage.

Abstract: There is provided an optical scanning device and an image forming apparatus including the optical scanning device. The optical scanning device includes an optical box containing light source units, a rotating polygon mirror, and a motor. In order to prevent the entire optical box from being deformed by deformation occurring in the installation region due to heat of the driving unit, the optical box includes a connection region between a second sidewall and an installation region where a driving unit is installed. The optical box further includes regions provided next to the connection region and having heights different from each other. A concave portion is formed in the connection region.

Abstract: According to one embodiment, a semiconductor memory device includes a first string; a second string; and a controller. The first string is coupled with a first bit line and includes first memory cells. The second string is coupled with a second bit line and includes second memory cells. The controller executes writing first data into the first memory cells and writing second data into the second memory cells simultaneously. The controller reads data from the first and second strings after writing the first and second data.

Abstract: There is provided an optical scanning device and an image forming apparatus including the optical scanning device. The optical scanning device includes an optical box containing light source units, a rotating polygon mirror, and a motor. In order to prevent the entire optical box from being deformed by deformation occurring in the installation region due to heat of the driving unit, the optical box includes a connection region between a second sidewall and an installation region where a driving unit is installed. The optical box further includes regions provided next to the connection region and having heights different from each other. A concave portion is formed in the connection region.

Abstract: A control circuit is configured to, during an erase operation, set a voltage of a first line connected to a selected cell unit to a voltage larger than a voltage of a gate of a first transistor included in the selected cell unit by an amount of a first voltage. The control circuit is configured to, during the erase operation, set a voltage difference between a voltage of a first line connected to an unselected cell unit and a voltage of a gate of a first transistor included in the unselected cell unit to a second voltage, the second voltage differing from the first voltage. In addition, the control circuit is configured to, during the erase operation, apply in the selected cell unit and the unselected cell unit a third voltage to a gate of at least one of dummy memory transistors in a dummy memory string, and apply a fourth voltage to a gate of another one of the dummy memory transistors in the dummy memory string, the fourth voltage being lower than the third voltage.

Abstract: According to one embodiment, a semiconductor memory device reads data in units of page. The device includes: a memory cell array; a plurality of latch circuits; and an arithmetic operation circuit. The memory cell array holds data multiplexed in at least three pages. The latch circuits read and hold the multiplexed data at a startup. The arithmetic operation circuit performs operations by use of the multiplexed data.

Abstract: According to one embodiment, a memory controller includes a controller that is configured to, when notified of an error by one of memory chips at a time of power supply startup, transmit a first command including an address to the memory chip by which the error was notified, when notified of a normal end by the memory chip in which the first command was received, transmit a second command including an address to the memory chip by which the normal end was notified.

Abstract: An image forming apparatus includes a shutter spring engaging with a cover at one end while engaging with a shutter at another end, configured to urge the shutter for a closed state from an open state, a buffer plate supported in a rotatable manner, configured to push the shutter for the open state from the closed state, and a buffer spring held between the buffer plate and the shutter, configured to urge the buffer plate in a direction separating from the shutter. In the image forming apparatus, elastic force of the buffer spring is greater than elastic force of the shutter spring, the buffer plate presses the shutter via the buffer spring, and a length of the buffer spring is greater than a solid height of the buffer spring when the shutter is pushed by the buffer plate to be moved to a position of the open state.

Abstract: An optical scanning apparatus includes a light source configured to emit a light beam, a rotating polygon mirror configured to deflect the light beam such that the light beam scans a photosensitive member, an optical box to which the rotating polygon mirror is attached and which includes a first portion, and a holding member configured to hold the light source, including a second portion and a protrusion portion, and attached to the optical box such that the first portion of the optical box and the second portion of the holding member form a gap therebetween, wherein the holding member is attached to the optical box with an adhesive poured into the gap, and the protrusion portion is arranged toward the optical box from the holding member along a position in the gap into which the adhesive is poured to prevent the adhesive from falling off the position.

Abstract: A control circuit is configured to, during an erase operation, set a voltage of a first line connected to a selected cell unit to a voltage larger than a voltage of a gate of a first transistor included in the selected cell unit by an amount of a first voltage. The control circuit is configured to, during the erase operation, set a voltage difference between a voltage of a first line connected to an unselected cell unit and a voltage of a gate of a first transistor included in the unselected cell unit to a second voltage, the second voltage differing from the first voltage. In addition, the control circuit is configured to, during the erase operation, apply in the selected cell unit and the unselected cell unit a third voltage to a gate of at least one of dummy memory transistors in a dummy memory string, and apply a fourth voltage to a gate of another one of the dummy memory transistors in the dummy memory string, the fourth voltage being lower than the third voltage.

Abstract: A non-volatile semiconductor storage device includes a memory cell array divided into blocks, each of which is a erasable unit, the blocks, the blocks including a first block which is determined to be a bad block and a second block which is determined to be a partial bad block, a storage unit configured to store address information of the first block and the second block, and a block decoder including a latch section which is configured to control selection and non-selection of the blocks, and to release data held by the latch section based on the stored address information of the second block.

Abstract: An optical scanning device which forms a plurality of scanning lines in parallel in a main scanning direction on a photosensitive member by a plurality of laser beams detects the curvature values in the sub-scanning direction of the scanning lines, and corrects a curvature value in the sub-scanning direction corresponding to each of the scanning lines. When detecting the curvature value, the optical scanning device detects the curvature values in the sub-scanning direction of two scanning lines, and calculates the curvature value in the sub-scanning direction of a scanning line between the two scanning lines based on the detected curvature values in the sub-scanning direction of the two scanning lines. With this arrangement, the curvatures in the sub-scanning direction of scanning lines are corrected effectively with high accuracy for all laser beams in a multi-beam optical scanning device using a VCSEL or the like.

Abstract: A control circuit is configured to, during an erase operation, set a voltage of a first line connected to a selected cell unit to a voltage larger than a voltage of a gate of a first transistor included in the selected cell unit by an amount of a first voltage. The control circuit is configured to, during the erase operation, set a voltage difference between a voltage of a first line connected to an unselected cell unit and a voltage of a gate of a first transistor included in the unselected cell unit to a second voltage, the second voltage differing from the first voltage. In addition, the control circuit is configured to, during the erase operation, apply in the selected cell unit and the unselected cell unit a third voltage to a gate of at least one of dummy memory transistors in a dummy memory string, and apply a fourth voltage to a gate of another one of the dummy memory transistors in the dummy memory string, the fourth voltage being lower than the third voltage.

Abstract: According to one embodiment, a semiconductor memory device reads data in units of page. The device includes: a memory cell array; a plurality of latch circuits; and an arithmetic operation circuit. The memory cell array holds data multiplexed in at least three pages. The latch circuits read and hold the multiplexed data at a startup. The arithmetic operation circuit performs operations by use of the multiplexed data.

Abstract: There is provided an optical scanning device and an image forming apparatus including the optical scanning device. The optical scanning device includes an optical box containing light source units, a rotating polygon mirror, and a motor. In order to prevent the entire optical box from being deformed by deformation occurring in the installation region due to heat of the driving unit, the optical box includes a connection region between a second sidewall and an installation region where a driving unit is installed. The optical box further includes regions provided next to the connection region and having heights different from each other. A concave portion is formed in the connection region.