Abstract: A duty cycle measurement circuit obtains differential duty cycle measurements corresponding to the duty cycle of a signal at two or more different locations along a propagation path. The differential duty cycle measurements may include measurements of an input duty cycle and measurements of an output duty cycle. The duty cycle measurements may be acquired by use of duty-cycle-to-voltage converter circuitry. The duty cycle measurements may be used to determine a measure of the duty cycle deterioration of the propagation path, and an adjustment factor to compensate for the measured duty cycle deterioration.

Abstract: A motor coil substrate includes a coil substrate including a flexible substrate and multiple coils formed on the flexible substrate such that the coils are extending from a first end toward a second end on the opposite side with respect to the first end. The flexible substrate includes inner peripheral and outer peripheral flexible substrates such that the coils include outer peripheral coils formed on the outer peripheral flexible substrate and inner peripheral coils formed on the inner peripheral flexible substrate, that a number of the outer peripheral coils and a number of the inner peripheral coils are L, that an m-th outer peripheral coil of the outer peripheral coils is positioned on a m-th inner peripheral coil of the inner peripheral coils, and that the m-th outer peripheral coil and the m-th inner peripheral coil are connected to each other in parallel, where L and m are natural numbers.

Abstract: A planar transformer includes a coil substrate including a flexible substrate and multiple coils formed on the flexible substrate. The coil substrate is formed to have coil parts and coilless parts such that the coil parts have the coils and that the coilless parts do not have the coils, and the coil substrate is folded such that at least one of the coilless parts is sandwiched between two of the coil parts.

Abstract: A motor coil includes a magnet structure, and a laminated coil substrate formed on the magnet structure and including coil substrates and adhesive layers alternately laminated. The coil substrates are formed by folding a printed wiring board including a resin substrate, a first conductor layer formed on a first surface of the resin substrate and forming coils, and a second conductor layer formed on a second surface on the opposite side with respect to the first surface and forming coils, and the adhesive layers include an adhesive layer including a magnetic sheet.

Abstract: A coil substrate includes a flexible substrate, and a coil including a wiring and formed on the flexible substrate. The flexible substrate has a cut penetrating through the flexible substrate such that the cut is formed to extend along a portion of the coil.

Abstract: A coil substrate for a motor includes a flexible substrate, and multiple coils formed on a surface of the flexible substrate. Each of the coils has a wiring having first wiring portions and second wiring portions extending from the first wirings respectively and is formed such that the first wiring portions extend parallel with respect to each other and that the second wiring portions extend not parallel to the first wirings, and the flexible substrate is formed to be formed around a magnet of a motor such that the first wiring portions form an angle that is substantially perpendicular to a rotation direction of the motor.

Abstract: A planar transformer includes a flexible insulating substrate having a first surface and a second surface on the opposite side with respect to the first surface, and multiple coils formed side by side on the first surface and the second surface of the flexible insulating substrate such that each of the coils includes a spiral-shaped wiring. The flexible insulating substrate has bending portions formed such that the flexible insulating substrate is folded at the bending portions and stack the coils one another.

Abstract: A planar transfoinier includes a flexible insulating substrate having a pair of short sides, a pair of long sides, a first surface, and a second surface on an opposite side with respect to the first surface, multiple coils formed side by side on the first surface and second surface of the flexible insulating substrate such that each of the coils has a spiral-shaped wiring, and multiple terminals formed on the flexible insulating substrate and connected to the coils respectively such that the terminals are positioned in a center portion of the flexible insulating substrate formed close to a center of the long sides of the flexible insulating substrate. The flexible insulating substrate has multiple bending portions formed such that the flexible insulating substrate is folded at the bending portions and stacks the coils one another.

Abstract: A motor coil substrate includes a flexible substrate, and multiple coils formed on the flexible substrate such that each of the coils has a spiral shape. The flexible substrate has multiple folding lines formed and the multiple coils positioned such that the flexible substrate is folded at the folding lines and wound around a magnet and that an m-th coil and an (m+1)-th coil of the coils partially overlap one another when folded at the folding lines.

Abstract: A motor coil substrate includes a flexible insulating substrate having a cylindrical shape, wirings formed on a first surface of the flexible insulating substrate and a second surface of the flexible insulating substrate on the opposite side with respect to the first surface, and via conductors including copper plating penetrating through the flexible insulating substrate such that the via conductors are connecting the wirings formed on the first surface and the wirings formed on the second surface. The wirings and the via conductors form coils formed in spiral shapes, and the flexible insulating substrate is wound more than one turn in a circumferential direction of the cylindrical shape such that the first surface on an inner side of the cylindrical shape and the second surface on an outer side of the cylindrical shape oppose each other.

Abstract: A laminated coil substrate includes a printed wiring board including a resin substrate, a first conductor layer on first surface of the substrate and including coils, and a second conductor layer formed on second surface of the substrate on the opposite side and including coils. The printed wiring board includes first, second and third coil substrates that are folded such that the second surface of the substrate in the first and second coil substrates oppose each other and that the first surface of the substrate in the second and third coil substrates oppose each other, the second conductor layer of the printed wiring board includes connection wire on the second surface of the substrate and connecting the first and second coil substrates, and the first conductor layer of the printed wiring board includes connection wire on the first surface of the substrate and connecting the second and third coil substrates.

Abstract: A motor coil includes a magnet structure, and a laminated coil substrate formed on the magnet structure and including coil substrates and adhesive layers alternately laminated. The coil substrates are formed by folding a printed wiring board including a resin substrate, a first conductor layer formed on a first surface of the resin substrate and forming coils, and a second conductor layer formed on a second surface on the opposite side with respect to the first surface and forming coils, and the adhesive layers include an adhesive layer including a magnetic sheet.

Abstract: A duty cycle measurement circuit obtains differential duty cycle measurements corresponding to the duty cycle of a signal at two or more different locations along a propagation path. The differential duty cycle measurements may include measurements of an input duty cycle and measurements of an output duty cycle. The duty cycle measurements may be acquired by use of duty-cycle-to-voltage converter circuitry. The duty cycle measurements may be used to determine a measure of the duty cycle deterioration of the propagation path, and an adjustment factor to compensate for the measured duty cycle deterioration.

Abstract: A coil includes a resin substrate, a first coil structure formed on a first surface of the resin substrate, a second coil structure formed on a second surface of the resin substrate on the opposite side with respect to the first surface such that the second coil structure is formed at a position corresponding to the first coil structure, a third coil structure formed on the second surface such that the third coil structure is positioned adjacent to the second coil structure, and a fourth coil structure formed on the first surface such that the fourth coil structure is formed at a position corresponding to the third coil structure. The resin substrate is folded such that the second coil structure and the third coil structure oppose each other.

Abstract: An input/output interface circuit is provided for a memory device. The input/output interface circuit receives a first control signal and a second control signal, and provides an output clock signal. The input/output interface circuit includes a plurality of circuit blocks coupled in series, the a plurality of circuit blocks including an input terminal coupled to the first control signal and the second control signal, and an output terminal providing the output clock signal, a plurality of power switch transistors, each power switch transistor including a control terminal and coupled between a corresponding one of the circuit blocks and a power supply terminal, and a plurality of switch control circuits, each switch control circuit coupled to the control terminal of a corresponding one of the power switch transistors. The switch control circuits are configured to activate the circuit blocks in a first predetermined order and deactivate the circuit blocks in a second predetermined order.

Abstract: A non-volatile storage system includes an impedance code calibration circuit. The device has a first variable impedance circuit and a second variable impedance circuit coupled to a calibration node. The device has a control circuit configured to access a previous impedance code for a previous impedance calibration and to divide the previous impedance code into a main impedance code and a remainder impedance code. The control circuit is configured to perform a search for a new impedance code starting with the main impedance code applied to the first variable impedance circuit while maintaining the remainder impedance code to the second variable impedance circuit. The control circuit is configured to add the final impedance code for the first variable impedance circuit with the remainder impedance code to produce a new impedance code for the impedance calibration.

Abstract: An input/output interface circuit is provided for a memory device. The input/output interface circuit receives a first control signal and a second control signal, and provides an output clock signal. The input/output interface circuit includes a plurality of circuit blocks coupled in series, the a plurality of circuit blocks including an input terminal coupled to the first control signal and the second control signal, and an output terminal providing the output clock signal, a plurality of power switch transistors, each power switch transistor including a control terminal and coupled between a corresponding one of the circuit blocks and a power supply terminal, and a plurality of switch control circuits, each switch control circuit coupled to the control terminal of a corresponding one of the power switch transistors. The switch control circuits are configured to activate the circuit blocks in a first predetermined order and deactivate the circuit blocks in a second predetermined order.

Abstract: An impedance calibration circuit is provided for off-chip driver/on-die termination circuits. The impedance calibration circuit includes a first circuit that includes first PMOS transistors coupled in parallel between a power supply terminal and a first output terminal, second PMOS transistors coupled in parallel between the power supply terminal and a second output terminal, first NMOS transistors coupled in parallel between the second output terminal and a GROUND terminal, a third PMOS transistor coupled in parallel with the first PMOS transistors between a power supply terminal and a first output terminal, and a second NMOS transistor coupled in parallel with the first NMOS transistors between the second output terminal and a GROUND terminal.

Abstract: A method for bypassing a defective through silicon via x in a group of n adjacent through silicon vias, includes receiving a plurality of relief signals to identify the defective through silicon via x, activating x?1 switch circuits to connect x?1 data circuits to through silicon vias 1 to x?1 in the group of n adjacent through silicon vias, activating n?x switch circuits to connect n?x data circuits to through silicon vias x+1 to n in the group of n adjacent through silicon vias, and activating a switch circuit to connect a data circuit to an auxiliary through silicon via which is adjacent through silicon via n in the group of n adjacent through silicon vias.

Abstract: A read process for a 3D stacked memory device provides an optimum level of channel boosting for unselected memory strings, to repress both normal and weak-erase types of read disturbs. The channel is boosted by controlling of voltages of bit lines (Vbl), drain-side select gates (Vsgd_unsel), source-side select gates (Vsgs_unsel), a selected level (word line layer) of the memory device (Vcg_sel), and unselected levels of the memory device (Vcg_unsel). A channel can be boosted by initially making the drain-side and source-side select gates non-conductive, to allow capacitive coupling from an increasing Vcg_unsel. The drain-side and/or source-side select gates are then made conductive by raising Vsgd_unsel and/or Vsgs_unsel, interrupting the boosting. Additionally boosting can occur by making the drain-side and/or source-side select gates non-conductive again while Vcg_unsel is still increasing. Or, the channel can be driven at Vbl.