Patents by Inventor Hitoshi Yamaguchi

Hitoshi Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7859048
    Abstract: A semiconductor device includes: a first semiconductor layer; a PN column layer having first and second column layers; and a second semiconductor layer. Each of the first and second column layers includes first and second columns alternately arranged along with a horizontal direction. The first and second column layers respectively have first and second impurity amount differences defined at a predetermined depth by subtracting an impurity amount in the second column from an impurity amount in the first column. The first impurity amount difference is constant and positive. The second impurity amount difference is constant and negative.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: December 28, 2010
    Assignee: Denso Corporation
    Inventors: Yuma Kagata, Jun Sakakibara, Hitoshi Yamaguchi
  • Patent number: 7838995
    Abstract: A semiconductor device includes: a first semiconductor layer; a p-n column portion over the first semiconductor layer and including second and third semiconductor layers, which are alternately arranged; and a peripheral portion adjacently to the p-n column portion and including a fourth semiconductor layer. An end second semiconductor layer has an impurity amount equal to or larger than a half of other second semiconductor layers. The third semiconductor layers include a large impurity amount portion adjacent to the end second semiconductor layer. The large impurity amount portion includes at least one third semiconductor layer having an impurity amount larger than an impurity amount of other third semiconductor layers.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: November 23, 2010
    Assignee: Denso Corporation
    Inventors: Yasushi Urakami, Hitoshi Yamaguchi, Jun Sakakibara
  • Publication number: 20100248623
    Abstract: A signal transmission device includes: an input signal conductor in which an input signal current flows and thereby generating an input signal magnetic field; a magnetically-biasing conductor in which a biasing current flows and thereby generating a biasing magnetic field; and one or more magnetoresistive elements in each of which a sensing current flows and thereby generating a self-biasing magnetic field, and each including a magnetization free layer having a magnetization direction which varies in response to the input signal magnetic field, the biasing magnetic field, and the self-biasing magnetic field. Each of the biasing magnetic field and the self-biasing magnetic field is applied to the magnetization free layer in a same direction to each other.
    Type: Application
    Filed: March 22, 2010
    Publication date: September 30, 2010
    Applicant: TDK CORPORATION
    Inventors: Susumu Haratani, Hitoshi Yamaguchi, Masahiro Miyazaki, Yoshio Sase, Shigeru Shimura
  • Publication number: 20100150677
    Abstract: A rotary cutting tool is provided which is less likely to cause chips to get stuck, and which can be manufactured at a low cost. The rotary cutting tool includes a body having a relief surface (6) and a rake face (7) which is connected to the relief surface (6). An oxide film (9) is formed on the rake face (7) by oxidizing the surface of the body, and a hard film (8) is formed on the relief surface (6) and the oxide film (9). The hard film (8) is made of a metal carbide, a metal nitride, a metal carbonitride, or a solid solution thereof.
    Type: Application
    Filed: January 15, 2007
    Publication date: June 17, 2010
    Inventor: Hitoshi Yamaguchi
  • Publication number: 20100112765
    Abstract: A manufacturing method of a semiconductor device includes: forming multiple trenches on a semiconductor substrate; forming a second conductive type semiconductor film in each trench to provide a first column with the substrate between two trenches and a second column with the second conductive type semiconductor film in the trench, the first and second columns alternately repeated along with a predetermined direction; thinning a second side of the substrate; and increasing an impurity concentration in a thinned second side so that a first conductive type layer is provided. The impurity concentration of the first conductive type layer is higher than the first column. The first column provides a drift layer so that a vertical type first-conductive-type channel transistor is formed.
    Type: Application
    Filed: November 9, 2009
    Publication date: May 6, 2010
    Applicant: DENSO CORPORATION
    Inventors: Hitoshi Yamaguchi, Takeshi Miyajima, Nozomu Akagi
  • Patent number: 7679143
    Abstract: A semiconductor device includes: a MOS transistor; a protection diode; and a semiconductor substrate. The MOS transistor and the protection diode are disposed in the semiconductor substrate. The drain of the MOS transistor is connected to the cathode of the protection diode. The source of the MOS transistor is connected to the anode of the protection diode. The MOS transistor has a withstand voltage defined as VT. The protection diode has a withstand voltage defined as VD, a parasitic resistance defined as RD, and a maximum current defined as IRmax. They satisfy a relationship of VT>VD+IRmax×RD. The maximum current of IRmax is equal to or larger than 45 Amperes.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: March 16, 2010
    Assignee: DENSO CORPORATION
    Inventors: Naohiro Suzuki, Hitoshi Yamaguchi
  • Publication number: 20090321819
    Abstract: A semiconductor device includes: a first semiconductor layer; a PN column layer having first and second column layers; and a second semiconductor layer. Each of the first and second column layers includes first and second columns alternately arranged along with a horizontal direction. The first and second column layers respectively have first and second impurity amount differences defined at a predetermined depth by subtracting an impurity amount in the second column from an impurity amount in the first column. The first impurity amount difference is constant and positive. The second impurity amount difference is constant and negative.
    Type: Application
    Filed: December 16, 2008
    Publication date: December 31, 2009
    Applicant: DENSO CORPORATION
    Inventors: Yuma Kagata, Jun Sakakibara, Hitoshi Yamaguchi
  • Publication number: 20090321015
    Abstract: To provide an adhesive composition which can exhibit high adhesion to a circuit board and also has ability capable of releasing the connection to the circuit board connected and reconnecting the circuit board (repairing properties). An adhesive composition comprising: (i) one or more aromatic-group-containing polyhydroxy ether resins, (ii) a compound having an alkoxysilyl group and an imidazole group in the molecule, and (iii) organic particles, wherein the content of the organic particles is 50% by weight or more based on the weight of the adhesive composition.
    Type: Application
    Filed: June 18, 2007
    Publication date: December 31, 2009
    Inventors: Kohichiro Kawate, Hitoshi Yamaguchi, Noriko Kikuchi, Tomihiro Hara, Yoshiyuki Ohkura
  • Patent number: 7635622
    Abstract: A manufacturing method of a semiconductor device includes: forming multiple trenches on a semiconductor substrate; forming a second conductive type semiconductor film in each trench to provide a first column with the substrate between two trenches and a second column with the second conductive type semiconductor film in the trench, the first and second columns alternately repeated along with a predetermined direction; thinning a second side of the substrate; and increasing an impurity concentration in a thinned second side so that a first conductive type layer is provided. The impurity concentration of the first conductive type layer is higher than the first column. The first column provides a drift layer so that a vertical type first-conductive-type channel transistor is formed.
    Type: Grant
    Filed: August 9, 2007
    Date of Patent: December 22, 2009
    Assignee: DENSO CORPORATION
    Inventors: Hitoshi Yamaguchi, Takeshi Miyajima
  • Patent number: 7633123
    Abstract: A semiconductor device includes: two main electrodes; multiple first regions; and multiple second regions. The first region having a first impurity concentration and a first width and the second region having a second impurity concentration and a second width are alternately repeated. A product of the first impurity concentration and the first width is equal to a product of the second impurity concentration and the second width. The first width is equal to or smaller than 4.5 ?m. The first impurity concentration is lower than a predetermined concentration satisfying a RESURF condition. A ratio between on-state resistances of the device at 27° C. and at 150° C. is smaller than 1.8.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: December 15, 2009
    Assignee: Denso Corporation
    Inventors: Shoichi Yamauchi, Hitoshi Yamaguchi, Yoshiyuki Hattori, Kyoko Okada
  • Patent number: 7601603
    Abstract: A method for manufacturing a semiconductor device includes the steps of: forming a trench in a semiconductor substrate; and forming an epitaxial film on the substrate including a sidewall and a bottom of the trench so that the epitaxial film is filled in the trench. The step of forming the epitaxial film includes a final step before the trench is filled with the epitaxial film. The final step has a forming condition of the epitaxial film in such a manner that the epitaxial film to be formed on the sidewall of the trench has a growth rate at an opening of the trench smaller than a growth rate at a position of the trench, which is deeper than the opening of the trench.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: October 13, 2009
    Assignees: DENSO CORPORATION, Sumitomo Mitsubishi Silicon Corporation
    Inventors: Shoichi Yamauchi, Hitoshi Yamaguchi, Tomoatsu Makino, Syouji Nogami, Tomonori Yamaoka
  • Patent number: 7591214
    Abstract: Provided is a driving motor controlling device of a construction machine, including a driving motor which is included in the construction machine having a swivel joint interposed between an upper body and a lower body, and is connected to a pump and a tank through the swivel joint, and a motor control valve which switches a state for connecting the pump and the tank to the driving motor such that the driving motor is controlled to a stop state, a normal rotation state, or a reverse rotation state, wherein the motor control valve has a neutral position for the stop state, a normal rotation position for the normal rotation state, and a reverse rotation position for the reverse rotation state, and is switched to the neutral position, the normal rotation position, or the reverse rotation position, based on a command from a control device manipulated by a operator and a pressure of an inflow side of hydraulic oil into the driving motor, wherein the motor control valve is disposed in the lower body in which the dri
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: September 22, 2009
    Assignee: Nabtesco Corporation
    Inventors: Teruhisa Ando, Nobuaki Shimizu, Masahiro Tsunemi, Hitoshi Yamaguchi
  • Patent number: 7564095
    Abstract: A semiconductor device includes: a semiconductor substrate; an element region having a semiconductor element including an impurity layer and a trench, wherein the impurity layer is disposed in the trench, and wherein the trench is disposed on a main surface of the substrate; and a field region disposed around the element region. The trench is an aggregation of a plurality of stripe line trenches so that the element region has a polygonal shape. The field region includes a dummy trench disposed along with one side of the polygonal shape on a periphery of the element region. The dummy trench has a width and a longitudinal direction, which are equal to those of the trench. The field region further includes an impurity layer disposed in the dummy trench.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: July 21, 2009
    Assignee: DENSO CORPORATION
    Inventors: Yasushi Urakami, Jun Sakakibara, Hitoshi Yamaguchi
  • Patent number: 7553722
    Abstract: A semiconductor device includes: a semiconductor substrate having a first surface and a second surface, wherein the substrate has a first conductive type; a first trench extending from the first surface of the semiconductor substrate in a depth direction; and an epitaxial semiconductor layer having a second conductive type, wherein the epitaxial semiconductor layer is disposed in the first trench. The first trench includes an inner wall as an interface between the semiconductor substrate and the epitaxial semiconductor layer so that the interface provides a PN junction. The first trench has an aspect ratio equal to or larger than 1.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: June 30, 2009
    Assignee: DENSO CORPORATION
    Inventors: Jun Sakakibara, Hitoshi Yamaguchi, Naohiro Suzuki
  • Publication number: 20090159963
    Abstract: A semiconductor device includes an insulated gate transistor and a resistor. The insulated gate transistor includes a plurality of first cells for supplying electric current to a load and a second cell for detecting an electric current that flows in the first cells. A gate terminal of the plurality of first cells is coupled with a gate terminal of the second cell and a source terminal of the plurality of first cells is coupled with a source terminal of the second cell on a lower potential side. The resistor has a first terminal coupled with a drain terminal of the second cell and a second terminal coupled with a drain terminal of the first cells on a higher potential side. A gate voltage of the insulated gate transistor is feedback-controlled based on an electric potential of the resistor.
    Type: Application
    Filed: November 18, 2008
    Publication date: June 25, 2009
    Applicant: DENSO CORPORATION
    Inventors: Hitoshi Yamaguchi, Tsuyoshi Yamamoto
  • Publication number: 20090121819
    Abstract: A magnetic coupler having higher response is provided. The magnetic coupler includes a thin film coil wound in a first layer; a first MR element being disposed in a second layer, and detecting an induced magnetic field generated by a signal current flowing through the thin film coil; and yokes being disposed close to the first MR element, and including a soft magnetic material. The first MR element is disposed in a position corresponding to a linear region of the thin film coil in a stacking direction. The yokes are disposed at both of an inner turn side and an outer turn side of the thin film coil in a manner of interposing the first MR element in the second layer. Thus, reduction in intensity of the induced magnetic field is suppressed, and intensity distribution of the induced magnetic field becomes flatter.
    Type: Application
    Filed: October 27, 2008
    Publication date: May 14, 2009
    Applicant: TDK CORPORATION
    Inventors: Susumu Haratani, Hitoshi Yamaguchi
  • Publication number: 20090114985
    Abstract: A semiconductor apparatus is disclosed. The semiconductor apparatus includes a semiconductor substrate that has a first surface and a second surface opposite to each other. The semiconductor apparatus further includes multiple double-sided electrode elements each having a pair of electrodes located respectively on the first and second surfaces of the semiconductor substrate. A current flows between the first and second electrode. Each double-sided electrode element has a PN column region located in the semiconductor substrate. The semiconductor apparatus further includes an insulation trench that surrounds each of multiple double-sided electrode elements, and that insulates and separates the multiple double-sided electrode elements from each other.
    Type: Application
    Filed: November 4, 2008
    Publication date: May 7, 2009
    Applicant: DESNO CORPORATION
    Inventors: Nozomu Akagi, Hitoshi Yamaguchi, Tetsuo Fujii
  • Patent number: 7517771
    Abstract: A method for manufacturing a semiconductor device includes steps of: forming a trench on a semiconductor substrate, which is made of silicon; and filling the trench with an epitaxial layer. The epitaxial layer is made of silicon, and the step of filling the trench includes a step of performing a plasma CVD method with using a silicon source gas. By using anisotropic character of a plasma, the epitaxial layer is selectively deposited on a bottom of the trench. Thus, the trench is filled with the epitaxial layer having no void.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: April 14, 2009
    Assignee: DENSO CORPORATION
    Inventors: Takumi Shibata, Shoichi Yamauchi, Hitoshi Yamaguchi, Masaru Hori
  • Publication number: 20090032965
    Abstract: A semiconductor device includes: a first semiconductor layer; a p-n column portion over the first semiconductor layer and including second and third semiconductor layers, which are alternately arranged; and a peripheral portion adjacently to the p-n column portion and including a fourth semiconductor layer. An end second semiconductor layer has an impurity amount equal to or larger than a half of other second semiconductor layers. The third semiconductor layers include a large impurity amount portion adjacent to the end second semiconductor layer. The large impurity amount portion includes at least one third semiconductor layer having an impurity amount larger than an impurity amount of other third semiconductor layers.
    Type: Application
    Filed: July 10, 2008
    Publication date: February 5, 2009
    Applicant: DENSO CORPORATION
    Inventors: Yasushi Urakami, Hitoshi Yamaguchi, Jun Sakakibara
  • Publication number: 20080246096
    Abstract: A semiconductor device includes a substrate, a plurality of first columns having a first conductivity type, a plurality of second columns having a second conductivity type, a first electrode, and a second electrode. The first columns and the second columns are alternately arranged on the substrate to provide a super junction structure. The first electrode is disposed on the super junction structure, forms schottky junctions with the first columns, and forms ohmic junctions with the second columns. The second electrode is disposed on the substrate on an opposite side of the super junction structure. At least a part of the substrate and the super junction structure has lattice defects to provide a lifetime control region at which a lifetime of a minority carrier is controlled to be short.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 9, 2008
    Applicant: DENSO CORPORATION
    Inventors: Jun Sakakibara, Hitoshi Yamaguchi