Patents by Inventor Ho-Ping Chen
Ho-Ping Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11162777Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.Type: GrantFiled: December 23, 2019Date of Patent: November 2, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Hsiang Tseng, Chin-Hsiang Lin, Heng-Hsin Liu, Jui-Chun Peng, Ho-Ping Chen
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Publication number: 20210088744Abstract: An optical module structure is provided. The optical module structure includes a holder, an elastic damper layer, and an optical component. The holder has an inner surface; the elastic damper layer is on the inner surface and has a trench at a first surface of the elastic damper layer; and the optical component is engaged with the elastic damper layer through the trench. Also, an optical system is provided. The optical system includes a light source, an, and a reflector, wherein a plurality of optical components in the optical module are arranged along a direction perpendicular to a direction of gravity.Type: ApplicationFiled: September 23, 2019Publication date: March 25, 2021Inventors: YUNG-YAO LEE, HO-PING CHEN
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Patent number: 10942329Abstract: An optical module structure is provided. The optical module structure includes a holder, an elastic damper layer, and an optical component. The holder has an inner surface; the elastic damper layer is on the inner surface and has a trench at a first surface of the elastic damper layer; and the optical component is engaged with the elastic damper layer through the trench. Also, an optical system is provided. The optical system includes a light source, an, and a reflector, wherein a plurality of optical components in the optical module are arranged along a direction perpendicular to a direction of gravity.Type: GrantFiled: September 23, 2019Date of Patent: March 9, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yung-Yao Lee, Ho-Ping Chen
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Publication number: 20200132436Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.Type: ApplicationFiled: December 23, 2019Publication date: April 30, 2020Inventors: Wei-Hsiang Tseng, Chin-Hsiang Lin, Heng-Hsin Liu, Jui-Chun Peng, Ho-Ping Chen
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Patent number: 10514247Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.Type: GrantFiled: January 8, 2018Date of Patent: December 24, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Hsiang Tseng, Chin-Hsiang Lin, Heng-Hsin Liu, Jui-Chun Peng, Ho-Ping Chen
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Patent number: 10061215Abstract: In a method for fabricating a resist pattern, a substrate coated with a photo resist is loaded on a stage of an exposure apparatus. Underlying patterns are fabricated on the substrate. A surface slope of an exposure area on the substrate is measured. An alignment measurement is performed by detecting an alignment pattern formed in the underlying patterns. An alignment measurement result is corrected based on the measured surface slope. The substrate is aligned to a photo mask by using the corrected alignment measurement result. The photo resist is exposed to radiation passing through the photo mask to form patterns.Type: GrantFiled: June 14, 2016Date of Patent: August 28, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yung-Yao Lee, Jui-Chun Peng, Ho-Ping Chen, Heng-Hsin Liu
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Patent number: 9978625Abstract: A semiconductor method is disclosed. The semiconductor method is performed upon semiconductor wafers, wherein each of the semiconductor wafers includes a first exposure field and a second exposure field, and each of the first exposure field and the second exposure field includes a first alignment mark and a second alignment mark. The method includes: determining a first alignment pattern for a first wafer by selecting one of the alignment marks of the first exposure field, and selecting one of the alignment marks of the second exposure field; performing the aligning operation upon the first semiconductor wafer by using the first alignment pattern; determining a second alignment pattern for a second wafer by selecting one of the alignment marks of the first exposure field, and selecting one of the alignment marks of the second exposure field, wherein the first alignment pattern is different from the second alignment pattern.Type: GrantFiled: June 1, 2016Date of Patent: May 22, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yung-Yao Lee, Jui-Chun Peng, Ho-Ping Chen, Heng-Hsin Liu
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Publication number: 20180128597Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.Type: ApplicationFiled: January 8, 2018Publication date: May 10, 2018Inventors: Wei-Hsiang Tseng, Chin-Hsiang Lin, Heng-Hsin Liu, Jui-Chun Peng, Ho-Ping Chen
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Publication number: 20170352564Abstract: A semiconductor method is disclosed. The semiconductor method is performed upon semiconductor wafers, wherein each of the semiconductor wafers includes a first exposure field and a second exposure field, and each of the first exposure field and the second exposure field includes a first alignment mark and a second alignment mark. The method includes: determining a first alignment pattern for a first wafer by selecting one of the alignment marks of the first exposure field, and selecting one of the alignment marks of the second exposure field; performing the aligning operation upon the first semiconductor wafer by using the first alignment pattern; determining a second alignment pattern for a second wafer by selecting one of the alignment marks of the first exposure field, and selecting one of the alignment marks of the second exposure field, wherein the first alignment pattern is different from the second alignment pattern.Type: ApplicationFiled: June 1, 2016Publication date: December 7, 2017Inventors: YUNG-YAO LEE, JUI-CHUN PENG, HO-PING CHEN, HENG-HSIN LIU
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Publication number: 20170277044Abstract: In a method for fabricating a resist pattern, a substrate coated with a photo resist is loaded on a stage of an exposure apparatus. Underlying patterns are fabricated on the substrate. A surface slope of an exposure area on the substrate is measured. An alignment measurement is performed by detecting an alignment pattern formed in the underlying patterns. An alignment measurement result is corrected based on the measured surface slope. The substrate is aligned to a photo mask by using the corrected alignment measurement result. The photo resist is exposed to radiation passing through the photo mask to form patterns.Type: ApplicationFiled: June 14, 2016Publication date: September 28, 2017Inventors: Yung-Yao LEE, Jui-Chun PENG, Ho-Ping CHEN, Heng-Hsin LIU
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Patent number: 9640487Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a first wafer and a second wafer. The light source is configured to provide a first light directed to the first wafer and a second light directed to the second wafer. The light detection device is configured to detect reflected light intensity from the first wafer to find a position of at least one wafer alignment mark of the first wafer and to detect reflected light intensity from the second wafer to find a position of at least one wafer alignment mark of the second wafer.Type: GrantFiled: April 16, 2015Date of Patent: May 2, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Hsiang Tseng, Chao-Hsiung Wang, Chin-Hsiang Lin, Heng-Hsin Liu, Ho-Ping Chen, Jui-Chun Peng
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Publication number: 20150219448Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a first wafer and a second wafer. The light source is configured to provide a first light directed to the first wafer and a second light directed to the second wafer. The light detection device is configured to detect reflected light intensity from the first wafer to find a position of at least one wafer alignment mark of the first wafer and to detect reflected light intensity from the second wafer to find a position of at least one wafer alignment mark of the second wafer.Type: ApplicationFiled: April 16, 2015Publication date: August 6, 2015Inventors: Wei-Hsiang TSENG, Chao-Hsiung WANG, Chin-Hsiang LIN, Heng-Hsin LIU, Ho-Ping CHEN, Jui-Chun PENG
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Patent number: 8616539Abstract: The present disclosure relates to a wafer chuck configured to provide a uniform photoresist layer on a workpiece. In some embodiments, the wafer chuck comprises a plurality of vacuum holes. The plurality of vacuum holes (i.e., more than one) are in fluid communication with a cavity that continuously extends along the top surface between the vacuum holes. A vacuum source, connected to each vacuum hole, is configured to remove gas molecules from the cavity located below the workpiece leaving behind a low pressure vacuum. The use of a plurality of vacuum holes increase the uniformity of the vacuum, thereby preventing the formation of high vacuum areas in close proximity to any specific vacuum hole. The reduction of high vacuum areas reduces wafer bending associated with the high vacuum areas.Type: GrantFiled: December 16, 2011Date of Patent: December 31, 2013Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wei-Hsiang Tseng, Jui-Chun Peng, Kai-Fa Ho, Ho-Ping Chen, Chia-Yun Lee
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Publication number: 20130258339Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide light directed to a backside of the wafer. The light detection device is configured to detect reflected light intensity from the backside of the wafer to find a position of at least one wafer alignment mark formed on the back side of the wafer.Type: ApplicationFiled: May 31, 2012Publication date: October 3, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Wei-Hsiang TSENG, Chin-Hsiang LIN, Heng-Hsin LIU, Jui-Chun PENG, Ho-Ping CHEN
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Publication number: 20130156947Abstract: The present disclosure relates to a wafer chuck configured to provide a uniform photoresist layer on a workpiece. In some embodiments, the wafer chuck comprises a plurality of vacuum holes. The plurality of vacuum holes (i.e., more than one) are in fluid communication with a cavity that continuously extends along the top surface between the vacuum holes. A vacuum source, connected to each vacuum hole, is configured to remove gas molecules from the cavity located below the workpiece leaving behind a low pressure vacuum. The use of a plurality of vacuum holes increase the uniformity of the vacuum, thereby preventing the formation of high vacuum areas in close proximity to any specific vacuum hole. The reduction of high vacuum areas reduces wafer bending associated with the high vacuum areas.Type: ApplicationFiled: December 16, 2011Publication date: June 20, 2013Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wei-Hsiang Tseng, Jui-Chun Peng, Kai-Fa Ho, Ho-Ping Chen, Chia-Yun Lee