Patents by Inventor Ho-Ping Chen

Ho-Ping Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11162777
    Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: November 2, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Hsiang Tseng, Chin-Hsiang Lin, Heng-Hsin Liu, Jui-Chun Peng, Ho-Ping Chen
  • Publication number: 20210088744
    Abstract: An optical module structure is provided. The optical module structure includes a holder, an elastic damper layer, and an optical component. The holder has an inner surface; the elastic damper layer is on the inner surface and has a trench at a first surface of the elastic damper layer; and the optical component is engaged with the elastic damper layer through the trench. Also, an optical system is provided. The optical system includes a light source, an, and a reflector, wherein a plurality of optical components in the optical module are arranged along a direction perpendicular to a direction of gravity.
    Type: Application
    Filed: September 23, 2019
    Publication date: March 25, 2021
    Inventors: YUNG-YAO LEE, HO-PING CHEN
  • Patent number: 10942329
    Abstract: An optical module structure is provided. The optical module structure includes a holder, an elastic damper layer, and an optical component. The holder has an inner surface; the elastic damper layer is on the inner surface and has a trench at a first surface of the elastic damper layer; and the optical component is engaged with the elastic damper layer through the trench. Also, an optical system is provided. The optical system includes a light source, an, and a reflector, wherein a plurality of optical components in the optical module are arranged along a direction perpendicular to a direction of gravity.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: March 9, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yung-Yao Lee, Ho-Ping Chen
  • Publication number: 20200132436
    Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.
    Type: Application
    Filed: December 23, 2019
    Publication date: April 30, 2020
    Inventors: Wei-Hsiang Tseng, Chin-Hsiang Lin, Heng-Hsin Liu, Jui-Chun Peng, Ho-Ping Chen
  • Patent number: 10514247
    Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Hsiang Tseng, Chin-Hsiang Lin, Heng-Hsin Liu, Jui-Chun Peng, Ho-Ping Chen
  • Patent number: 10061215
    Abstract: In a method for fabricating a resist pattern, a substrate coated with a photo resist is loaded on a stage of an exposure apparatus. Underlying patterns are fabricated on the substrate. A surface slope of an exposure area on the substrate is measured. An alignment measurement is performed by detecting an alignment pattern formed in the underlying patterns. An alignment measurement result is corrected based on the measured surface slope. The substrate is aligned to a photo mask by using the corrected alignment measurement result. The photo resist is exposed to radiation passing through the photo mask to form patterns.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: August 28, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yung-Yao Lee, Jui-Chun Peng, Ho-Ping Chen, Heng-Hsin Liu
  • Patent number: 9978625
    Abstract: A semiconductor method is disclosed. The semiconductor method is performed upon semiconductor wafers, wherein each of the semiconductor wafers includes a first exposure field and a second exposure field, and each of the first exposure field and the second exposure field includes a first alignment mark and a second alignment mark. The method includes: determining a first alignment pattern for a first wafer by selecting one of the alignment marks of the first exposure field, and selecting one of the alignment marks of the second exposure field; performing the aligning operation upon the first semiconductor wafer by using the first alignment pattern; determining a second alignment pattern for a second wafer by selecting one of the alignment marks of the first exposure field, and selecting one of the alignment marks of the second exposure field, wherein the first alignment pattern is different from the second alignment pattern.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: May 22, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yung-Yao Lee, Jui-Chun Peng, Ho-Ping Chen, Heng-Hsin Liu
  • Publication number: 20180128597
    Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.
    Type: Application
    Filed: January 8, 2018
    Publication date: May 10, 2018
    Inventors: Wei-Hsiang Tseng, Chin-Hsiang Lin, Heng-Hsin Liu, Jui-Chun Peng, Ho-Ping Chen
  • Publication number: 20170352564
    Abstract: A semiconductor method is disclosed. The semiconductor method is performed upon semiconductor wafers, wherein each of the semiconductor wafers includes a first exposure field and a second exposure field, and each of the first exposure field and the second exposure field includes a first alignment mark and a second alignment mark. The method includes: determining a first alignment pattern for a first wafer by selecting one of the alignment marks of the first exposure field, and selecting one of the alignment marks of the second exposure field; performing the aligning operation upon the first semiconductor wafer by using the first alignment pattern; determining a second alignment pattern for a second wafer by selecting one of the alignment marks of the first exposure field, and selecting one of the alignment marks of the second exposure field, wherein the first alignment pattern is different from the second alignment pattern.
    Type: Application
    Filed: June 1, 2016
    Publication date: December 7, 2017
    Inventors: YUNG-YAO LEE, JUI-CHUN PENG, HO-PING CHEN, HENG-HSIN LIU
  • Publication number: 20170277044
    Abstract: In a method for fabricating a resist pattern, a substrate coated with a photo resist is loaded on a stage of an exposure apparatus. Underlying patterns are fabricated on the substrate. A surface slope of an exposure area on the substrate is measured. An alignment measurement is performed by detecting an alignment pattern formed in the underlying patterns. An alignment measurement result is corrected based on the measured surface slope. The substrate is aligned to a photo mask by using the corrected alignment measurement result. The photo resist is exposed to radiation passing through the photo mask to form patterns.
    Type: Application
    Filed: June 14, 2016
    Publication date: September 28, 2017
    Inventors: Yung-Yao LEE, Jui-Chun PENG, Ho-Ping CHEN, Heng-Hsin LIU
  • Patent number: 9640487
    Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a first wafer and a second wafer. The light source is configured to provide a first light directed to the first wafer and a second light directed to the second wafer. The light detection device is configured to detect reflected light intensity from the first wafer to find a position of at least one wafer alignment mark of the first wafer and to detect reflected light intensity from the second wafer to find a position of at least one wafer alignment mark of the second wafer.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: May 2, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Hsiang Tseng, Chao-Hsiung Wang, Chin-Hsiang Lin, Heng-Hsin Liu, Ho-Ping Chen, Jui-Chun Peng
  • Publication number: 20150219448
    Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a first wafer and a second wafer. The light source is configured to provide a first light directed to the first wafer and a second light directed to the second wafer. The light detection device is configured to detect reflected light intensity from the first wafer to find a position of at least one wafer alignment mark of the first wafer and to detect reflected light intensity from the second wafer to find a position of at least one wafer alignment mark of the second wafer.
    Type: Application
    Filed: April 16, 2015
    Publication date: August 6, 2015
    Inventors: Wei-Hsiang TSENG, Chao-Hsiung WANG, Chin-Hsiang LIN, Heng-Hsin LIU, Ho-Ping CHEN, Jui-Chun PENG
  • Patent number: 8616539
    Abstract: The present disclosure relates to a wafer chuck configured to provide a uniform photoresist layer on a workpiece. In some embodiments, the wafer chuck comprises a plurality of vacuum holes. The plurality of vacuum holes (i.e., more than one) are in fluid communication with a cavity that continuously extends along the top surface between the vacuum holes. A vacuum source, connected to each vacuum hole, is configured to remove gas molecules from the cavity located below the workpiece leaving behind a low pressure vacuum. The use of a plurality of vacuum holes increase the uniformity of the vacuum, thereby preventing the formation of high vacuum areas in close proximity to any specific vacuum hole. The reduction of high vacuum areas reduces wafer bending associated with the high vacuum areas.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: December 31, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Hsiang Tseng, Jui-Chun Peng, Kai-Fa Ho, Ho-Ping Chen, Chia-Yun Lee
  • Publication number: 20130258339
    Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide light directed to a backside of the wafer. The light detection device is configured to detect reflected light intensity from the backside of the wafer to find a position of at least one wafer alignment mark formed on the back side of the wafer.
    Type: Application
    Filed: May 31, 2012
    Publication date: October 3, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Hsiang TSENG, Chin-Hsiang LIN, Heng-Hsin LIU, Jui-Chun PENG, Ho-Ping CHEN
  • Publication number: 20130156947
    Abstract: The present disclosure relates to a wafer chuck configured to provide a uniform photoresist layer on a workpiece. In some embodiments, the wafer chuck comprises a plurality of vacuum holes. The plurality of vacuum holes (i.e., more than one) are in fluid communication with a cavity that continuously extends along the top surface between the vacuum holes. A vacuum source, connected to each vacuum hole, is configured to remove gas molecules from the cavity located below the workpiece leaving behind a low pressure vacuum. The use of a plurality of vacuum holes increase the uniformity of the vacuum, thereby preventing the formation of high vacuum areas in close proximity to any specific vacuum hole. The reduction of high vacuum areas reduces wafer bending associated with the high vacuum areas.
    Type: Application
    Filed: December 16, 2011
    Publication date: June 20, 2013
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Hsiang Tseng, Jui-Chun Peng, Kai-Fa Ho, Ho-Ping Chen, Chia-Yun Lee