Abstract: A semiconductor memory device includes a memory cell array, an error correction circuit, an error log register and a control logic circuit. The memory cell array includes a plurality of memory bank arrays and each of the memory bank arrays includes a plurality of pages. The control logic circuit is configured to control the error correction circuit to perform an ECC decoding sequentially on some of the pages designated at least one access address for detecting at least one bit error, in response to a first command received from a memory controller. The control logic circuit performs an error logging operation to write page error information into the error log register and the page error information includes a number of error occurrence on each of the some pages determined from the detecting.

Abstract: Disclosed is a quenching circuit including an avalanche photodiode and a quenching diode applying a bias voltage to the avalanche photodiode. Since the quenching circuit includes the quenching diode instead of a quenching resistor, the avalanche photodiode can quickly recover to linear mode from Geiger mode, and the bias voltage applied to the avalanche photodiode is stably maintained even though a current level of the avalanche photodiode fluctuates according to the intensity of incident light.

Abstract: Disclosed is a quenching circuit including an avalanche photodiode and a quenching diode applying a bias voltage to the avalanche photodiode. Since the quenching circuit includes the quenching diode instead of a quenching resistor, the avalanche photodiode can quickly recover to linear mode from Geiger mode, and the bias voltage applied to the avalanche photodiode is stably maintained even though a current level of the avalanche photodiode fluctuates according to the intensity of incident light.

Abstract: Exemplary embodiments of the present invention disclose a unidirectional heterojunction transistor including a channel layer made of a first nitride-based semiconductor having a first energy bandgap, a barrier layer made of a second nitride-based semiconductor having a second energy bandgap different from the first energy bandgap, the barrier layer including a recess, a drain electrode disposed on a first region of the barrier layer, and a recessed-drain Schottky electrode disposed in the recess of the barrier layer, the recessed-drain Schottky electrode contacting the drain electrode.

Abstract: Exemplary embodiments of the present invention disclose a unidirectional heterojunction transistor including a channel layer made of a first nitride-based semiconductor having a first energy bandgap, a barrier layer made of a second nitride-based semiconductor having a second energy bandgap different from the first energy bandgap, the barrier layer including a recess, a drain electrode disposed on a first region of the barrier layer, and a recessed-drain Schottky electrode disposed in the recess of the barrier layer, the recessed-drain Schottky electrode contacting the drain electrode.

Abstract: The present disclosure provides apparatus and method for phosphorous removal using dolomite by mixing an inorganic coagulant and dolomite together to improve the phosphorous removal efficiency and controlling pH, which has been lowered due to the use of the inorganic coagulant, close to the neutral by means of dolomite to improve the economic feasibility and minimize an additional neutralizing process.

Abstract: Provided are an apparatus for removing phosphorous from wastewater including: a first coagulation sedimentation unit including a first rapid mixing tank, a first flocculation tank and a first sedimentation tank; and a second coagulation sedimentation unit including a second rapid mixing tank, a second flocculation tank and a second sedimentation tank, and a method for removing phosphorous using the same. The first rapid mixing tank stirs wastewater and an inorganic coagulant with low basicity at high speed and the second rapid mixing tank stirs the treated water supplied from the first sedimentation tank and an inorganic coagulant with high basicity at high speed. As a result, removal of phosphorous from the wastewater is maximized and coagulation and sedimentation may be optimized through control of metal content in the inorganic coagulants added to the first rapid mixing tank and the second rapid mixing tank.

Abstract: A semiconductor device is disclosed. The semiconductor device comprises, a first region of a first conductivity type, a second region of a second conductivity type disposed adjacent to the first region to form a p-n junction structure, a resistance modification region of the second conductivity type, and a field response modification region of the second conductivity type disposed between the resistance modification region and the second region, wherein the field response modification region comprises a varying dopant concentration distribution along a thickness direction of the field response modification region.

Abstract: A semiconductor device is disclosed. The semiconductor device comprises, a first region of a first conductivity type, a second region of a second conductivity type disposed adjacent to the first region to form a p-n junction structure, a resistance modification region of the second conductivity type, and a field response modification region of the second conductivity type disposed between the resistance modification region and the second region, wherein the field response modification region comprises a varying dopant concentration distribution along a thickness direction of the field response modification region.

Abstract: A heterostructure device or article includes a carrier transport layer, a back channel layer and a barrier layer. The carrier transport layer has a first surface and a second surface opposing to the first surface. The back channel layer is secured to the first surface of the carrier transport layer and the barrier layer is secured to the second surface of the carrier transport layer. Each of the carrier transport layer, the back channel layer and the barrier layer comprises an aluminum gallium nitride alloy. The article further includes a 2D electron gas at an interface of the second surface of the carrier transport layer and a surface of the barrier layer. The 2D electron gas is defined by a bandgap differential at an interface, which allows for electron mobility. A system includes a heterostructure field effect transistor that includes the article.