Patents by Inventor Hoa Phan

Hoa Phan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8456329
    Abstract: In one preferred embodiment, an aircraft marshaling wand controller displays aircraft marshaling instructions to a pilot on a video display monitor on-board an aircraft, such as an aircraft on an aircraft carrier. When an aircraft marshal uses arm motion gestures to form aircraft marshaling instructions for the pilot on the aircraft, the wand controller of the present invention senses or detects those gesture motions, and generates digitized command signals representative of those gesture motions made by the aircraft marshal. A wireless transceiver then transmits those digitized command signals to the aircraft for display on the video monitor for viewing by the pilot.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: June 4, 2013
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Nghia Tran, Hoa Phan, Tu-Anh Ton, John D. Rockway, Anthony Ton
  • Patent number: 8421448
    Abstract: A system includes a controller, a Hall-effect sensor and transceiver connected to the controller; and a flux-producing element having a plurality of magnetic flux lines emanating therefrom. The system may be secured to or contained within a wearable glove. The flux-producing element may be coupled to an object separate from the wearable glove. The Hall-effect sensor transmits a Hall-effect sensor signal to the controller when the Hall-effect sensor is perpendicular to at least some of the plurality of magnetic flux lines. The Hall-effect sensor signal may include data received from the flux-producing element. The controller transmits a controller signal to the transceiver after receiving the Hall-effect sensor signal. The controller signal may include input from a motion sensor and/or an orientation sensor connected to the controller. The transceiver may transmit the signal to a remote processor. The signal may be used for gesture recognition, information coding, and/or information processing.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: April 16, 2013
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Nghia Tran, Sunny Fugate, Marion Ceruti, Lorraine Duffy, Hoa Phan
  • Patent number: 8279091
    Abstract: A system includes a controller and an RFID sensor, an RFID sensor reader having a detection region, and a transceiver connected to the controller. The system may be secured to or contained within a wearable glove. The RFID sensor is configured to transmit an RFID sensor signal to the RFID sensor reader when the RFID sensor is within the detection region. The RFID sensor reader is configured to transmit an RFID sensor reader signal to the controller after receiving the RFID sensor signal. The controller is configured to transmit a signal to the transceiver after receiving the RFID sensor reader signal. The signal may include input from a motion sensor and/or an orientation sensor connected to the controller. The transceiver may transmit the signal to a remote processor via an antenna. The signal may be used for gesture recognition, information coding, and/or information processing.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: October 2, 2012
    Assignee: The United States of America as Represented by the Secretary of the Navy
    Inventors: Nghia Tran, Sunny Fugate, Jeffrey Ellen, Lorraine Duffy, Hoa Phan
  • Publication number: 20070210819
    Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.
    Type: Application
    Filed: May 10, 2007
    Publication date: September 13, 2007
    Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
  • Publication number: 20070205786
    Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.
    Type: Application
    Filed: May 10, 2007
    Publication date: September 6, 2007
    Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
  • Publication number: 20070205757
    Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.
    Type: Application
    Filed: May 10, 2007
    Publication date: September 6, 2007
    Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
  • Publication number: 20070205758
    Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.
    Type: Application
    Filed: May 10, 2007
    Publication date: September 6, 2007
    Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
  • Publication number: 20070205773
    Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.
    Type: Application
    Filed: May 10, 2007
    Publication date: September 6, 2007
    Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
  • Publication number: 20070205797
    Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.
    Type: Application
    Filed: May 10, 2007
    Publication date: September 6, 2007
    Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
  • Publication number: 20070205756
    Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.
    Type: Application
    Filed: May 10, 2007
    Publication date: September 6, 2007
    Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
  • Publication number: 20070205796
    Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.
    Type: Application
    Filed: May 10, 2007
    Publication date: September 6, 2007
    Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
  • Publication number: 20060257149
    Abstract: One embodiment of the present invention provides a system that accommodates multiple optical segments in an Ethernet passive optical network (EPON), wherein the EPON includes a central node and a number of remote nodes, and wherein the remote nodes reside in a number of optical segments. During operation, the system transmits downstream data from the central node to the remote nodes by broadcasting the data to the optical segments. In addition, the system selectively allows an optical segment to communicate with the central node during an upstream transmission period assigned to a remote node residing in that optical segment, thereby accommodating multiple optical segments and hence an increased number of remote nodes within the EPON.
    Type: Application
    Filed: May 16, 2005
    Publication date: November 16, 2006
    Inventors: Ryan Hirth, Edward Boyd, Hoa Phan
  • Publication number: 20060152237
    Abstract: Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.
    Type: Application
    Filed: January 12, 2005
    Publication date: July 13, 2006
    Inventors: John Corbin, Jose Garza, Dales Kent, Kenneth Larsen, Howard Mahaney, Hoa Phan, John Salazar
  • Publication number: 20050030053
    Abstract: An innovative chip testing system and method includes controlling temperature and condensation during testing. Coarse temperature is controlled by providing a desired fluid flow rate and fluid temperature to a cold plate. Fine temperature control is provided by a feedback loop which controls the power dissipation of cartridge heaters installed within the cold plate. Condensation control is provided by insulating various components of the system, manipulation of dry compressed air in enclosures to reduce surface dew point temperatures, usage of cartridge heaters in a card backside stiffener plate, and by providing a heatsink assembly which prevents condensation on the insulation.
    Type: Application
    Filed: August 20, 2004
    Publication date: February 10, 2005
    Inventors: Daniel Beaman, John Corbin, Dales Kent, Howard Mahaney, Hoa Phan, Frederic Wright
  • Publication number: 20050030052
    Abstract: An innovative chip testing system and method includes controlling temperature and condensation during testing. Coarse temperature is controlled by providing a desired fluid flow rate and fluid temperature to a cold plate. Fine temperature control is provided by a feedback loop which controls the power dissipation of cartridge heaters installed within the cold plate. Condensation control is provided by insulating various components of the system, manipulation of dry compressed air in enclosures to reduce surface dew point temperatures, usage of cartridge heaters in a card backside stiffener plate, and by providing a heatsink assembly which prevents condensation on the insulation.
    Type: Application
    Filed: August 6, 2003
    Publication date: February 10, 2005
    Applicant: International Business Machines Corporation
    Inventors: Daniel Beaman, John Corbin, Dales Kent, Howard Mahaney, Hoa Phan, Frederic Wright