Patents by Inventor Ho-cheol Jang
Ho-cheol Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11936318Abstract: Charging system and method using a motor driving system are proposed. The charging system includes a battery, an inverter to which D.C. power stored in the battery is applied, including a plurality of legs each including two switching elements, a motor including a plurality of coils of which first ends are respectively connected to connection nodes of the switching elements of each of the plurality of legs, and second ends are connected to each other to form a neutral point, and an inverter driving part configured to control switching of the switching elements, so that switching speeds of the switching elements are different for each mode of a motor driving mode and a charging mode so as to change magnitude of charging voltage supplied to the neutral point of the motor and to output the charging voltage to the battery.Type: GrantFiled: June 1, 2022Date of Patent: March 19, 2024Assignees: HYUNDAI MOTOR COMPANY, KIA CORPORATIONInventors: Ji Woong Jang, Sang Cheol Shin, Yoo Jong Lee, Ki Jong Lee, Ho Tae Chun
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Patent number: 11922962Abstract: A Unified Speech and Audio Codec (USAC) that may process a window sequence based on mode switching is provided. The USAC may perform encoding or decoding by overlapping between frames based on a folding point when mode switching occurs. The USAC may process different window sequences for each situation to perform encoding or decoding, and thereby may improve a coding efficiency.Type: GrantFiled: August 25, 2022Date of Patent: March 5, 2024Assignees: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, KWANGWOON UNIVERSITY INDUSTRY-ACADEMIC COLLABORATION FOUNDATIONInventors: Seungkwon Beack, Tae Jin Lee, Min Je Kim, Kyeongok Kang, Dae Young Jang, Jeongil Seo, Jin Woo Hong, Chieteuk Ahn, Ho Chong Park, Young-cheol Park
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Publication number: 20230197775Abstract: A semiconductor device having a super junction and a method of manufacturing the semiconductor device capable of obtaining a high breakdown voltage are provided, whereby charge balance of the super junction is further accurately controlled in the semiconductor device that is implemented by an N-type pillar and a P-type pillar. The semiconductor device includes a semiconductor substrate; and a blocking layer including a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction, wherein, in the blocking layer, a density profile of a first conductive type dopant may be uniform in the horizontal direction, and the density profile of the first conductive type dopant may vary in the vertical direction.Type: ApplicationFiled: February 15, 2023Publication date: June 22, 2023Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jae-gil LEE, Jin-myung KIM, Kwang-won LEE, Kyoung-deok KIM, Ho-cheol JANG
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Patent number: 11588016Abstract: A semiconductor device having a super junction and a method of manufacturing the semiconductor device capable of obtaining a high breakdown voltage are provided, whereby charge balance of the super junction is further accurately controlled in the semiconductor device that is implemented by an N-type pillar and a P-type pillar. The semiconductor device includes a semiconductor substrate; and a blocking layer including a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction, wherein, in the blocking layer, a density profile of a first conductive type dopant may be uniform in the horizontal direction, and the density profile of the first conductive type dopant may vary in the vertical direction.Type: GrantFiled: September 16, 2021Date of Patent: February 21, 2023Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jae-gil Lee, Jin-myung Kim, Kwang-won Lee, Kyoung-deok Kim, Ho-cheol Jang
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Publication number: 20230047928Abstract: In a method for controlling an operation of a sphere type shifting apparatus, and according to an exemplary embodiment of the present disclosure, it is possible to prevent a sphere mechanism from being separated from a rotation completion location upon rotation operation of the sphere mechanism including a shifting unit provided on a hemispherical one side thereof and a design unit provided on a hemispherical other side thereof, preventing occurrence of clearance of the sphere mechanism, and to terminate an operation of a motor as necessary when the sphere mechanism cannot reach the rotation completion location due to sticking thereof or foreign substances stuck thereto upon rotation operation of the sphere mechanism, preventing damage to parts.Type: ApplicationFiled: June 6, 2022Publication date: February 16, 2023Applicants: Hyundai Motor Company, Kia CorporationInventors: Min Gi SONG, Ki Young SONG, Hee En ZOO, Yong Min CHAE, Ho Cheol JANG
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Publication number: 20220005924Abstract: A semiconductor device having a super junction and a method of manufacturing the semiconductor device capable of obtaining a high breakdown voltage are provided, whereby charge balance of the super junction is further accurately controlled in the semiconductor device that is implemented by an N-type pillar and a P-type pillar. The semiconductor device includes a semiconductor substrate; and a blocking layer including a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction, wherein, in the blocking layer, a density profile of a first conductive type dopant may be uniform in the horizontal direction, and the density profile of the first conductive type dopant may vary in the vertical direction.Type: ApplicationFiled: September 16, 2021Publication date: January 6, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jae-gil LEE, Jin-myung KIM, Kwang-won LEE, Kyoung-deok KIM, Ho-cheol JANG
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Patent number: 11133379Abstract: A semiconductor device having a super junction and a method of manufacturing the semiconductor device capable of obtaining a high breakdown voltage are provided, whereby charge balance of the super junction is further accurately controlled in the semiconductor device that is implemented by an N-type pillar and a P-type pillar. The semiconductor device includes a semiconductor substrate; and a blocking layer including a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction, wherein, in the blocking layer, a density profile of a first conductive type dopant may be uniform in the horizontal direction, and the density profile of the first conductive type dopant may vary in the vertical direction.Type: GrantFiled: December 20, 2019Date of Patent: September 28, 2021Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jae-gil Lee, Jin-myung Kim, Kwang-won Lee, Kyoung-deok Kim, Ho-cheol Jang
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Publication number: 20200127088Abstract: A semiconductor device having a super junction and a method of manufacturing the semiconductor device capable of obtaining a high breakdown voltage are provided, whereby charge balance of the super junction is further accurately controlled in the semiconductor device that is implemented by an N-type pillar and a P-type pillar. The semiconductor device includes a semiconductor substrate; and a blocking layer including a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction, wherein, in the blocking layer, a density profile of a first conductive type dopant may be uniform in the horizontal direction, and the density profile of the first conductive type dopant may vary in the vertical direction.Type: ApplicationFiled: December 20, 2019Publication date: April 23, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jae-gil LEE, Jin-myung KIM, Kwang-won LEE, Kyoung-deok KIM, Ho-cheol JANG
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Publication number: 20170179225Abstract: A semiconductor device having a super junction and a method of manufacturing the semiconductor device capable of obtaining a high breakdown voltage are provided, whereby charge balance of the super junction is further accurately controlled in the semiconductor device that is implemented by an N-type pillar and a P-type pillar. The semiconductor device includes a semiconductor substrate; and a blocking layer including a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction, wherein, in the blocking layer, a density profile of a first conductive type dopant may be uniform in the horizontal direction, and the density profile of the first conductive type dopant may vary in the vertical direction.Type: ApplicationFiled: March 9, 2017Publication date: June 22, 2017Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jae-gil LEE, Jin-myung KIM, Kwang-won LEE, Kyoung-deok KIM, Ho-cheol JANG
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Patent number: 9070713Abstract: A power semiconductor device includes: a drain region of a first conductive type; a drift region of a first conductive type formed on the drain region; a first body region of a second conductive type formed below an upper surface of the drift region; a second body region of a second conductive type formed below the upper surface of the drift region and in the first body region; a third body region of a second conductive type formed by protruding downwards from a lower end of the first body region; a source region of a first conductive type formed below the upper surface of the drift region and in the first body region; and a gate insulating layer formed on channel regions of the first body region and on the drift region between the first body regions.Type: GrantFiled: January 27, 2014Date of Patent: June 30, 2015Assignee: Fairchild Korea Semiconductor Ltd.Inventors: Jin-myung Kim, Se-woong Oh, Jae-gil Lee, Young-chul Choi, Ho-cheol Jang
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Publication number: 20140141584Abstract: A power semiconductor device includes: a drain region of a first conductive type; a drift region of a first conductive type formed on the drain region; a first body region of a second conductive type formed below an upper surface of the drift region; a second body region of a second conductive type formed below the upper surface of the drift region and in the first body region; a third body region of a second conductive type formed by protruding downwards from a lower end of the first body region; a source region of a first conductive type formed below the upper surface of the drift region and in the first body region; and a gate insulating layer formed on channel regions of the first body region and on the drift region between the first body regions.Type: ApplicationFiled: January 27, 2014Publication date: May 22, 2014Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.Inventors: Jin-myung KIM, Se-woong OH, Jae-gil LEE, Young-chul CHOI, Ho-cheol JANG
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Patent number: 8716085Abstract: A method of fabricating a high-voltage semiconductor device includes the following steps: providing a semiconductor layer; forming a plurality of trenches in the semiconductor layer to define a plurality of pillars of a first conductivity type in the semiconductor layer between adjacent trenches, wherein the trenches extend from a top surface of the semiconductor layer toward a bottom surface of the semiconductor layer; forming a charge compensation layer of a second conductivity type over at least sidewalls of each trench to a predetermined thickness thereby forming a groove in each trench; and substantially filling each groove with a charge compensation plug of the first conductivity type.Type: GrantFiled: January 5, 2011Date of Patent: May 6, 2014Assignee: Fairchild Korea Semiconductor, Ltd.Inventors: Jae-gil Lee, Chang-wook Kim, Ho-cheol Jang, Chong-man Yun
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Patent number: 8674402Abstract: A power semiconductor device includes: a drain region of a first conductive type; a drift region of a first conductive type formed on the drain region; a first body region of a second conductive type formed below an upper surface of the drift region; a second body region of a second conductive type formed below the upper surface of the drift region and in the first body region; a third body region of a second conductive type formed by protruding downwards from a lower end of the first body region; a source region of a first conductive type formed below the upper surface of the drift region and in the first body region; and a gate insulating layer formed on channel regions of the first body region and on the drift region between the first body regions.Type: GrantFiled: April 10, 2012Date of Patent: March 18, 2014Assignee: Fairchild Korea Semiconductor Ltd.Inventors: Jin-myung Kim, Se-woong Oh, Jae-gil Lee, Young-chul Choi, Ho-cheol Jang
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Publication number: 20120299094Abstract: A semiconductor device having a super junction and a method of manufacturing the semiconductor device capable of obtaining a high breakdown voltage are provided, whereby charge balance of the super junction is further accurately controlled in the semiconductor device that is implemented by an N-type pillar and a P-type pillar. The semiconductor device includes a semiconductor substrate; and a blocking layer including a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction, wherein, in the blocking layer, a density profile of a first conductive type dopant may be uniform in the horizontal direction, and the density profile of the first conductive type dopant may vary in the vertical direction.Type: ApplicationFiled: January 19, 2012Publication date: November 29, 2012Inventors: Jae-gil LEE, Jin-myung KIM, Kwang-won LEE, Kyoung-deok KIM, Ho-cheol JANG
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Publication number: 20120261715Abstract: A power semiconductor device includes: a drain region of a first conductive type; a drift region of a first conductive type formed on the drain region; a first body region of a second conductive type formed below an upper surface of the drift region; a second body region of a second conductive type formed below the upper surface of the drift region and in the first body region; a third body region of a second conductive type formed by protruding downwards from a lower end of the first body region; a source region of a first conductive type formed below the upper surface of the drift region and in the first body region; and a gate insulating layer formed on channel regions of the first body region and on the drift region between the first body regions.Type: ApplicationFiled: April 10, 2012Publication date: October 18, 2012Inventors: Jin-myung KIM, Se-woong OH, Jae-gil LEE, Young-chul CHOI, Ho-cheol JANG
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Publication number: 20120161274Abstract: A superjunction semiconductor device includes an edge p pillar, an active region, and a termination region. The edge p pillar has a rectangular ring shape with rounded corners. The edge p pillar has an outer region surrounding the active region and an inner region on in the sides of the active region. The active region has active p pillars and active n pillars having vertical stripe shapes. The active p pillars and the active n pillars are alternately arranged horizontally in the active region. The termination region includes termination n pillars and termination p pillars alternately arranged around the edge p pillar.Type: ApplicationFiled: December 14, 2011Publication date: June 28, 2012Applicant: Fairchild Korea Semiconductor Ltd.Inventors: Jae-gil Lee, Jin-young Jung, Ho-cheol Jang, Chong-man Yun
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Patent number: 8084815Abstract: A superjunction semiconductor device includes an edge p pillar, an active region, and a termination region. The edge p pillar has a rectangular ring shape with rounded corners surrounding the active region. The active region includes an active n region and active p pillars having vertical stripe shapes disposed at regular intervals in the active n region. The top and bottom ends of the active p pillars are separated from the edge p pillar. The termination region includes termination n pillars and termination p pillars alternately arranged around the edge p pillar. Surplus p charges that are not used to balance the quantity of p charges and the quantity of n charges among p charges included in the upper and lower parts of the edge p pillar are eliminated or n charges are supplemented to balance the quantity of p charges and the quantity of n charges.Type: GrantFiled: June 29, 2005Date of Patent: December 27, 2011Assignee: Fairchild Korea Semiconductor Ltd.Inventors: Jae-gil Lee, Jin-young Jung, Ho-cheol Jang, Chong-man Yun
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Publication number: 20110097864Abstract: A method of fabricating a high-voltage semiconductor device includes the following steps: providing a semiconductor layer; forming a plurality of trenches in the semiconductor layer to define a plurality of pillars of a first conductivity type in the semiconductor layer between adjacent trenches, wherein the trenches extend from a top surface of the semiconductor layer toward a bottom surface of the semiconductor layer; forming a charge compensation layer of a second conductivity type over at least sidewalls of each trench to a predetermined thickness thereby forming a groove in each trench; and substantially filling each groove with a charge compensation plug of the first conductivity type.Type: ApplicationFiled: January 5, 2011Publication date: April 28, 2011Inventors: Jae-gil Lee, Chang-wook Kim, Ho-cheol Jang, Chong-man Yun
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Patent number: D973030Type: GrantFiled: February 26, 2021Date of Patent: December 20, 2022Assignee: DONG WOON ANATECH CO., LTDInventors: Yu-Hwang Lee, Jung-Hyun Eum, Ho-Cheol Jang
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Patent number: D989013Type: GrantFiled: August 2, 2021Date of Patent: June 13, 2023Assignee: DONG WOON ANATECH CO., LTDInventors: Yu-Hwang Lee, Jung-Hyun Eum, Ho-Cheol Jang