Abstract: An arrangement of semiconductor memory devices includes a first semiconductor memory device and a second semiconductor memory device. The arrangement of semiconductor memory devices also has a flexible substrate. A first electrically conductive conductor track is arranged in the flexible substrate. At least one first contact of the flexible substrate is coupled to the at least one second contact of the second semiconductor memory device through the first electrically conductive conductor track. A second electrically conductive conductor track is arranged in the flexible substrate.

Abstract: An arrangement of semiconductor memory devices includes a first semiconductor memory device and a second semiconductor memory device. The arrangement of semiconductor memory devices also has a flexible substrate. A first electrically conductive conductor track is arranged in the flexible substrate. At least one first contact of the flexible substrate is coupled to the at least one second contact of the second semiconductor memory device through the first electrically conductive conductor track. A second electrically conductive conductor track is arranged in the flexible substrate.

Abstract: An oscillator circuit for generating signals with a predetermined oscillator frequency is provided. The oscillator circuit has at least one resonator and at least one load impedance connected to the resonator. The oscillator circuit may be fully automatically trimmed and economically produced and, moreover, is of an improved quality wherein the load impedance comprises at least one structure which may be machined by means of high-energy radiation to trim the resonant characteristics of the oscillator circuit.

Abstract: A stacked semiconductor memory device includes memory device contacts to externally connect the stacked semiconductor memory device to a printed circuit board. In a dual or quad stack configuration, the stacked semiconductor memory device includes a first package which is stacked above a second package. The first and second packages are preferably designed as FBGA packages, each of them including package contacts. By providing first and second flexible circuit structures to connect the package contacts of the first and second packages to the memory device contacts, a symmetrical stacked package configuration is obtained. This configuration facilitates transmission of signals with improved signal integrity via a bus of the printed circuit board between the stacked semiconductor memory device and a controller chip, even if the frequency of the bus or the load of the stacked semiconductor memory is increased.

Abstract: An oscillator circuit for generating signals with a predetermined oscillator frequency is provided. The oscillator circuit has at least one resonator and at least one load impedance connected to the resonator. The oscillator circuit may be fully automatically trimmed and economically produced and, moreover, is of an improved quality wherein the load impedance comprises at least one structure which may be machined by means of high-energy radiation to trim the resonant characteristics of the oscillator circuit.

Abstract: A radar sensor and a radar antenna are for monitoring the environment of a motor vehicle. A compact construction is achieved by the planar array of both the control circuit and the radar antenna, so that the radar sensor may be located, for example, in the area of a motor-vehicle bumper. Example configurations consist of the separate line support for arranging lines to transmit high-frequency signals between the control circuit and the radar antenna and the configuration of the radar antenna as a Rotman lens, in relation to the signal propagation times and the layered arrangement of Rotman lens and group antenna.

Abstract: A measuring instrument (11) for fill level sensors (4) having a measuring electrode (6) and a compensating electrode (9). The measuring instrument (11) has a bridge circuit whose one bridge branch (21) is formed by two series-connected test resistors (23, 24). The other bridge branch (22) is formed by the measuring resistor (17) on the measuring electrode (6) and the compensating resistor (18) on the compensating electrode (9). Between the two bridge branches (21, 22) a diagonal line (26) with a test switch (27) is provided. The measuring instrument (11) is controlled by the control circuit (13) so that the diagonal line (26) is closed outside of preset test time periods, and interrupted at preset test time periods. The end of the diagonal line (26) located between the two test resistors (23, 24) is connected to the base potential (25) of the measuring circuit (12).