Patents by Inventor Holger Schulze

Holger Schulze has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150130013
    Abstract: A semiconductor device includes at least one ohmic contact region between a semiconductor substrate of the semiconductor device and an electrically conductive structure arranged adjacent to the semiconductor substrate. Further, the semiconductor device includes at least one Schottky contact region between the semiconductor substrate of the semiconductor device and the electrically conductive structure. The at least one ohmic contact region is arranged adjacent to the at least one Schottky contact region. The semiconductor substrate includes a first doping layer arranged adjacent to the electrically conductive structure. An average doping concentration of the surface region of the first doping layer in an area of the at least one ohmic contact region differs from an average doping concentration of the surface region of the first doping layer in an area of the at least one Schottky contact region by less than 10%.
    Type: Application
    Filed: November 14, 2013
    Publication date: May 14, 2015
    Applicant: Infineon Technologies AG
    Inventors: Holger Hüsken, Anton Mauder, Hans-Joachim Schulze, Wolfgang Rösner, Holger Schulze
  • Publication number: 20150097262
    Abstract: A semiconductor diode includes a semiconductor body and trench structures extending from a surface of the semiconductor body into the semiconductor body. The semiconductor body includes a doped layer of a first conductivity type and a doped zone of a second conductivity type opposite to the first conductivity type. The doped zone is formed between the doped layer and a first surface of the semiconductor body. The trench structures are arranged between electrically connected portions of the semiconductor body. The trench structures do not include conductive structures that are both electrically insulated from the semiconductor body and electrically connected with another structure outside the trench structures.
    Type: Application
    Filed: November 20, 2014
    Publication date: April 9, 2015
    Inventors: Anton Mauder, Franz-Josef Niedernostheide, Hans-Joachim Schulze, Holger Schulze
  • Publication number: 20150041963
    Abstract: According to one embodiment of a semiconductor device, the semiconductor device includes a semiconductor substrate having a first surface, an insulation layer having a laterally varying thickness on the first surface, and a metal layer on the first surface. The insulation layer has ripples in its surface facing the metal layer. According to another embodiment of a semiconductor device, the semiconductor device includes a semiconductor substrate having a first surface and including at least one of a laterally varying thickness and an inclined first surface. The first surface of the semiconductor substrate has ripples.
    Type: Application
    Filed: October 23, 2014
    Publication date: February 12, 2015
    Inventors: Hans-Joachim Schulze, Johannes Laven, Holger Schulze
  • Patent number: 8921931
    Abstract: A semiconductor body of a semiconductor device includes a doped layer of a first conductivity type and one or more doped zones of a second conductivity type. The one or more doped zones are formed between the doped layer and the first surface of a semiconductor body. Trench structures extend from one of the first and the second opposing surface into the semiconductor body. The trench structures are arranged between portions of the semiconductor body which are electrically connected to each other. The trench structures may be arranged for mitigating mechanical stress, locally controlling charge carrier mobility, locally controlling a charge carrier recombination rate and/or shaping buried diffusion zones.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: December 30, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Franz-Josef Niedernostheide, Hans-Joachim Schulze, Holger Schulze
  • Patent number: 8895453
    Abstract: A layer with a laterally varying thickness, a substrate with a first surface and an insulation layer formed on the first surface of the substrate is provided. A plurality of at least one of recesses and openings is formed in the insulation layer, wherein the plurality is arranged at a pitch. Each of the at least one of recesses and openings has a lateral width, wherein at least one of the pitch and the lateral width varies in a lateral direction. The plurality of the at least one of recesses and openings defines a given region in the insulation layer. The insulation layer having the plurality of the at least one of the recesses and openings is tempered at elevated temperatures so that the insulation layer at least partially diffluences to provide the insulation layer with a laterally varying thickness at least in the given region.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: November 25, 2014
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Johannes Laven, Holger Schulze
  • Patent number: 8778157
    Abstract: Provided is a method for processing a sample, which method comprises: a) contacting a binding phase, which binding phase is capable of binding an analyte, with the sample in the presence of a medium; b) applying across the medium a first alternating field composed of a plurality of pulses and having a first frequency, a first pulse duration and a first pulse rise time; c) optionally applying across the medium a second alternating field; and d) thereby influencing the sample and/or the binding phase in the medium.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: July 15, 2014
    Assignee: ITI Scotland Limited
    Inventors: Holger Schulze, Till Bachmann, Andrew Mount
  • Patent number: 8741750
    Abstract: A method for fabricating a semiconductor body is presented. The semiconductor body includes a p-conducting zone, an n-conducting zone and a pn junction in a depth T1 in the semiconductor body between the p-conducting zone and the n-conducting zone. The method includes providing the semiconductor body, producing the p-doped zone by the diffusion of an impurity that forms an acceptor in a first direction into the semiconductor body, and producing the n-conducting zone by the implantation of protons in the first direction into the semiconductor body into a depth T2>T1 and the subsequent heat treatment of the semiconductor body in order to form hydrogen-induced donors.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: June 3, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Frank Hille, Franz Josef Niedernostheide, Hans-Joachim Schulze, Holger Schulze
  • Publication number: 20140015007
    Abstract: A semiconductor device includes a cell region having at least one device cell, wherein the at least one device cell includes a first device region of a first conductivity type. The semiconductor device further includes a drift region of a second conductivity type adjoining the first device region of the at least one device cell, a doped region of the first conductivity type adjoining the drift region, and charge carrier lifetime reduction means configured to reduce a charge carrier lifetime in the doped region of the first conductivity type.
    Type: Application
    Filed: June 21, 2013
    Publication date: January 16, 2014
    Inventors: Dorothea Werber, Frank Pfirsch, Hans-Joachim Schulze, Carsten Schaeffer, Volodymyr Komarnitskyy, Anton Mauder, Holger Schulze, Gerhard Miller
  • Publication number: 20130320487
    Abstract: A semiconductor body of a semiconductor device includes a doped layer of a first conductivity type and one or more doped zones of a second conductivity type. The one or more doped zones are formed between the doped layer and the first surface of a semiconductor body. Trench structures extend from one of the first and the second opposing surface into the semiconductor body. The trench structures are arranged between portions of the semiconductor body which are electrically connected to each other. The trench structures may be arranged for mitigating mechanical stress, locally controlling charge carrier mobility, locally controlling a charge carrier recombination rate and/or shaping buried diffusion zones.
    Type: Application
    Filed: June 4, 2012
    Publication date: December 5, 2013
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Anton Mauder, Franz-Josef Niedernostheide, Hans-Joachim Schulze, Holger Schulze
  • Patent number: 8367532
    Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: February 5, 2013
    Assignee: Infineon Technologies AG
    Inventors: Anton Mauder, Hans-Joachim Schulze, Frank Hille, Holger Schulze, Manfred Pfaffenlehner, Carsten Schäffer, Franz-Josef Niedernostheide
  • Publication number: 20120315747
    Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.
    Type: Application
    Filed: July 26, 2012
    Publication date: December 13, 2012
    Inventors: Anton MAUDER, Hans-Joachim SCHULZE, Frank HILLE, Holger SCHULZE, Manfred PFAFFENLEHNER, Carsten SCHÄFFER, Franz-Josef NIEDERNOSTHEIDE
  • Patent number: 8252671
    Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: August 28, 2012
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Hans-Joachim Schulze, Frank Hille, Holger Schulze, Manfred Pfaffenlehner, Carsten Schaeffer, Franz-Josef Niedernostheide
  • Publication number: 20110275202
    Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.
    Type: Application
    Filed: July 20, 2011
    Publication date: November 10, 2011
    Inventors: Anton MAUDER, Hans-Joachim Schulze, Frank Hille, Holger Schulze, Manfred Pfaffenlehner, Carsten Schäffer, Franz-Josef Niedernostheide
  • Patent number: 8003502
    Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: August 23, 2011
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Hans-Joachim Schulze, Frank Hille, Holger Schulze, Manfred Pfaffenlehner, Carsten Schaeffer, Franz-Josef Niedernostheide
  • Publication number: 20110077166
    Abstract: Provided is a method of attaching a substance to a surface, which method comprises contacting a surface comprising amine reactive groups with a substance labelled with a peptide tag such that the substance is covalently attached to the surface via the peptide tag, wherein the peptide tag comprises one or more histidine residues, one of which is a terminal histidine residue having a free N-terminal amino group. Also provided is a method of processing or analysis which comprises a method of attaching a substance to a surface as detailed above and comprises one or more further steps of processing or analysing the substance.
    Type: Application
    Filed: March 10, 2009
    Publication date: March 31, 2011
    Applicant: ITI SCOTLAND LIMITED
    Inventors: Colin Campbell, Holger Schulze, Till Bachmann
  • Publication number: 20110031123
    Abstract: Provided is a method for processing a sample, which method comprises: a) contacting a binding phase, which binding phase is capable of binding an analyte, with the sample in the presence of a medium; b) applying across the medium a first alternating field composed of a plurality of pulses and having a first frequency, a first pulse duration and a first pulse rise time; c) optionally applying across the medium a second alternating field; and d) thereby influencing the sample and/or the binding phase in the medium.
    Type: Application
    Filed: March 11, 2009
    Publication date: February 10, 2011
    Applicant: ITI SCOTLAND LIMITED
    Inventors: Holger Schulze, Till Bachmann, Andrew Mount
  • Patent number: 7842590
    Abstract: A method for manufacturing a semiconductor device by laser annealing. One embodiment provides a semiconductor substrate having a first surface and a second surface. The second surface is arranged opposite to the first surface. A first dopant is introduced into the semiconductor substrate at the second surface such that its peak doping concentration in the semiconductor substrate is located at a first depth with respect to the second surface. A second dopant is introduced into the semiconductor surface at the second surface such that its peak doping concentration in the semiconductor substrate is located at a second depth with respect to the second surface, wherein the first depth is larger than the second depth. At least a first laser anneal is performed by directing at least one laser beam pulse onto the second surface to melt the semiconductor substrate, at least in sections, at the second surface.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: November 30, 2010
    Assignee: Infineon Technologies Austria AG
    Inventors: Thomas Gutt, Frank Umbach, Hans Peter Felsl, Manfred Pfaffenlehner, Franz-Josef Niedernostheide, Holger Schulze
  • Patent number: 7754590
    Abstract: Some embodiments of the invention relate to manufacturing a semiconductor device with an implantation layer on a semiconductor substrate including a method of manufacturing such an implantation layer, wherein said implantation layer is formed in an implantation step at a predetermined depth of penetration, determined from a top surface of said semiconductor substrate, using a particle beam, by increasing its path distance to a main implantation peak and correspondingly increasing the energy level of said particle beam for producing an undamaged implantation layer having a thickness that is increased significantly compared with the thickness of an implantation layer that would be produced at said predetermined depth of penetration using a particle beam with non-increased path distance and energy level.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: July 13, 2010
    Assignee: Infineon Technologies Austria AG
    Inventors: Hans-Joachim Schulze, Holger Schulze, Andreas Kyek
  • Publication number: 20100087053
    Abstract: A method for fabricating a semiconductor body is presented. The semiconductor body includes a p-conducting zone, an n-conducting zone and a pn junction in a depth T1 in the semiconductor body between the p-conducting zone and the n-conducting zone. The method includes providing the semiconductor body, producing the p-doped zone by the diffusion of an impurity that forms an acceptor in a first direction into the semiconductor body, and producing the n-conducting zone by the implantation of protons in the first direction into the semiconductor body into a depth T2>T1 and the subsequent heat treatment of the semiconductor body in order to form hydrogen-induced donors.
    Type: Application
    Filed: September 30, 2009
    Publication date: April 8, 2010
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Frank Hille, Franz Josef Niedernostheide, Hans-Joachim Schulze, Holger Schulze
  • Publication number: 20090267200
    Abstract: A method for manufacturing a semiconductor device by laser annealing. One embodiment provides a semiconductor substrate having a first surface and a second surface. The second surface is arranged opposite to the first surface. A first dopant is introduced into the semiconductor substrate at the second surface such that its peak doping concentration in the semiconductor substrate is located at a first depth with respect to the second surface. A second dopant is introduced into the semiconductor surface at the second surface such that its peak doping concentration in the semiconductor substrate is located at a second depth with respect to the second surface, wherein the first depth is larger than the second depth. At least a first laser anneal is performed by directing at least one laser beam pulse onto the second surface to melt the semiconductor substrate, at least in sections, at the second surface.
    Type: Application
    Filed: April 28, 2008
    Publication date: October 29, 2009
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Thomas Gutt, Frank Umbach, Hans Peter Felsl, Manfred Pfaffenlehner, Franz-Josef Niedernostheide, Holger Schulze