Patents by Inventor Holloway H. Frost

Holloway H. Frost has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10748670
    Abstract: A Thorium molten salt energy system is disclosed that includes a proton beam source for producing a proton beam, that can vary between a first energy level and a second energy level of, where the generated proton bean can be directed into a main assembly containing both Thorium-containing molten salt and Thorium fuel rods, each containing an inner Beryllium element and an outer solid Thorium element. The generated proton beam can be shaped and directed to impinge upon Lithium within the molten salt to promote the generation of thermal neutrons and the fission of Uranium within the molten salt. The generated proton beam can also be shaped and directed to impinge upon the Beryllium within the Thorium fuel rods to promote the generation of high energy neutrons.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: August 18, 2020
    Assignee: Texas Thorium, LLC
    Inventors: Holloway H. Frost, Trevor D. Parker, Rodolfo Vaghetto, Yassin A. Hassan, Lin Shao
  • Patent number: 10720245
    Abstract: A Thorium fuel rod assembly is disclosed that includes first and second support elements and a number of Thorium fuel rods positioned between support elements. Each of the Thorium fuel rod includes an outer fuel element containing a solid Thorium an inner core element containing Beryllium that is positioned within an interior cavity defined by the outer fuel element. In an exemplary disclosure, the inner core element also defines an inner cavity such that a beam of high energy particles may be directed into the inner cavity of the inner core element to impinge upon a Beryllium nucleus within the inner core element to produce a (p, n) reaction resulting in the emission of a neutron, where the emitted neutron may interact with a Thorium nucleus in the outer fuel element to cause the Thorium nucleus to fission.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: July 21, 2020
    Assignee: Texas Thorium, LLC
    Inventors: Rodolfo Vaghetto, Holloway H. Frost, Yassin A. Hassan, Lin Shao, Trevor D. Parker
  • Patent number: 10700768
    Abstract: An air-to-ground communication system including: a plurality of ground stations, where each ground station includes a plurality of ground-based directional antennae having a beam width associated with a particular area of the sky above the ground station and for each ground-based directional antenna, a least one software defined radio coupled to the directional antenna to enable the ground-based directional antenna to transmit radio frequency signals generated by the software defined radio and to provide to the software defined radio frequency signals received by the ground-based directional antenna and a plurality of air stations, each including a number of air-based directional antennae and an air station control unit, each air-based directional antenna having a beam width associated with a particular area of the sky below the air station; for each air-based directional antenna, a least one software defined radio coupled to the air-based directional antenna in such a manner as enable the air-based direction
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: June 30, 2020
    Inventor: Holloway H. Frost
  • Patent number: 9983927
    Abstract: Methods and apparatuses for enhanced protection of data stored in a non-volatile memory system involve a controller capable of adapting to the failure of one or more non-volatile memory devices in the memory system. The controller stores data in the form of page stripes, each page stripe composed of data pages, and each data page stored in a different non-volatile memory device. The controller also detects failure of a non-volatile memory device in which a data page of a particular page stripe is stored, reconstructs the data page, and stores the reconstructed data page in a new page stripe, where the number of data pages in the new page stripe is less than the number of data pages in the particular page stripe, and where no page of the new page stripe is stored in a memory location within the failed non-volatile memory device.
    Type: Grant
    Filed: September 7, 2015
    Date of Patent: May 29, 2018
    Assignee: International Business Machines Corporation
    Inventors: Holloway H. Frost, Charles J. Camp, James A. Fuxa
  • Patent number: 9792054
    Abstract: Methods and apparatuses for optimizing the performance of a storage system comprise a FLASH storage system, a hard drive storage system, and a storage controller. The storage controller is adapted to receive READ and WRITE requests from an external host, and is coupled to the FLASH storage system and the hard drive storage system. The storage controller receives a WRITE request from an external host containing data and an address, forwards the received WRITE request to the FLASH storage system and associates the address provided in the WRITE request with a selected alternative address, and provides an alternative WRITE request, including the selected alternative address and the data received in the WRITE request, to the hard drive storage system, wherein the alternative address is selected to promote sequential WRITE operations within the hard drive storage system.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: October 17, 2017
    Assignee: International Business Machines Corporation
    Inventors: Holloway H. Frost, Daniel E. Scheel
  • Patent number: 9619419
    Abstract: The disclosed embodiments relate to a Flash-based memory module having high-speed serial communication. The Flash-based memory module comprises, among other things, a plurality of I/O modules, each configured to communicate with an external device over one or more external communication links, a plurality of Flash-based memory cards, each comprising a plurality of Flash memory devices, and a plurality of crossbar switching elements, each being connected to a respective one of the Flash-based memory cards and configured to allow each one of the I/O modules to communicate with the respective one of the Flash-based memory cards. Each I/O module is connected to each crossbar switching element by a high-speed serial communication link, and each crossbar switching element is connected to the respective one of the Flash-based memory cards by a plurality of parallel communication links.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: April 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Holloway H. Frost, Rebecca J. Hutsell
  • Patent number: 9513830
    Abstract: The disclosed embodiments are directed to methods and apparatuses for providing efficient and enhanced protection of data stored in a nonvolatile memory system. The methods and apparatuses involve a system controller for a plurality of nonvolatile memory devices in the nonvolatile memory system that is capable of protecting data using two layers of data protection, including inter-card card stripes and intra-card page stripes.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: December 6, 2016
    Assignee: International Business Machines Corporation
    Inventors: Holloway H. Frost, Charles J. Camp, Kenneth Scianna, Lance W. Shelton
  • Patent number: 9501235
    Abstract: Methods and apparatuses for reduction of Read Disturb errors in a NAND FLASH memory system comprise a controller configured to organize FLASH memory devices into blocks, each block having a plurality of pages, and each page defining an individually addressable physical memory location. The controller is further configured to accumulate a Block READ Count corresponding to the number of times any pages in a first block of pages have been read since the first block was last erased. Once the READ count reaches a predetermined number, the controller responds to subsequent READ requests for pages within the first block by moving data associated with a requested page to a page in a second, different block without moving data associated with other pages in the first block, and modifying a logical-to-physical translation table to associate the moved data with the physical address of the page in the second block.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: November 22, 2016
    Assignee: International Business Machines Corporation
    Inventors: Holloway H. Frost, Charles J. Camp, Timothy J. Fisher, James A. Fuxa, Lance W. Shelton
  • Patent number: 9471512
    Abstract: A Flash-based storage system, card, and/or module comprises a Flash controller configured to encrypt the data pages of a page stripe by shuffling the data pages, including loading each data page into a data shuffling buffer in a sequential order relative to other data pages in the page stripe, and thereafter unloading each data page in a non-sequential order relative to other data pages in the page stripe. The Flash controller is also configured to scramble the data pages of the page stripe by performing a bitwise logical operation on the data pages that are unloaded from the data shuffling buffer. A user key and one or more system keys are used to perform the shuffling and scrambling. The Flash controller is further configured to flush the user key by bypassing the system's backup power supply and performing an emergency system shutdown without backing up system data.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: October 18, 2016
    Assignee: International Business Machines Corporation
    Inventors: Holloway H. Frost, Charles J. Camp
  • Publication number: 20160283327
    Abstract: A Flash-based memory system comprises a plurality of Flash memory devices, a Flash controller communicating independently with each Flash memory device to perform memory operations, a power circuit providing power the Flash memory devices, and a CPU configured to perform a controlled powering down procedure upon detecting a power failure. In some embodiments, the Flash-based memory system includes a backup power source having a charge storage device and charging circuitry, the CPU configured to perform one or more test procedures on the charge storage device to provide an indication of a charge storage capacity of the charge storage device. A plurality of Flash-based memory systems may be mounted on a Flash-based memory card, and multiple such Flash-based memory cards may be combined into a Flash-based memory module. A number of Flash-based memory modules may then be removably mounted in a rack-mountable housing to form unitary Flash-based memory unit.
    Type: Application
    Filed: June 6, 2016
    Publication date: September 29, 2016
    Inventors: Holloway H. FROST, Don D. DAVIS, Adrian P. GLOVER, Lance W. SHELTON
  • Publication number: 20160202922
    Abstract: Methods and apparatuses for optimizing the performance of a storage system comprise a FLASH storage system, a hard drive storage system, and a storage controller. The storage controller is adapted to receive READ and WRITE requests from an external host, and is coupled to the FLASH storage system and the hard drive storage system. The storage controller receives a WRITE request from an external host containing data and an address, forwards the received WRITE request to the FLASH storage system and associates the address provided in the WRITE request with a selected alternative address, and provides an alternative WRITE request, including the selected alternative address and the data received in the WRITE request, to the hard drive storage system, wherein the alternative address is selected to promote sequential WRITE operations within the hard drive storage system.
    Type: Application
    Filed: March 21, 2016
    Publication date: July 14, 2016
    Inventors: Holloway H. FROST, Daniel E. SCHEEL
  • Publication number: 20160162211
    Abstract: Methods and apparatuses for reduction of Read Disturb errors in a NAND FLASH memory system comprise a controller configured to organize FLASH memory devices into blocks, each block having a plurality of pages, and each page defining an individually addressable physical memory location. The controller is further configured to accumulate a Block READ Count corresponding to the number of times any pages in a first block of pages have been read since the first block was last erased. Once the READ count reaches a predetermined number, the controller responds to subsequent READ requests for pages within the first block by moving data associated with a requested page to a page in a second, different block without moving data associated with other pages in the first block, and modifying a logical-to-physical translation table to associate the moved data with the physical address of the page in the second block.
    Type: Application
    Filed: February 1, 2016
    Publication date: June 9, 2016
    Inventors: Holloway H. Frost, Charles J. Camp, Timothy J. Fisher, James A. Fuxa, Lance W. Shelton
  • Patent number: 9361984
    Abstract: A Flash-based memory system comprises a plurality of Flash memory devices, a Flash controller communicating independently with each Flash memory device to perform memory operations, a power circuit providing power the Flash memory devices, and a CPU configured to perform a controlled powering down procedure upon detecting a power failure. In some embodiments, the Flash-based memory system includes a backup power source having a charge storage device and charging circuitry, the CPU configured to perform one or more test procedures on the charge storage device to provide an indication of a charge storage capacity of the charge storage device. A plurality of Flash-based memory systems may be mounted on a Flash-based memory card, and multiple such Flash-based memory cards may be combined into a Flash-based memory module. A number of Flash-based memory modules may then be removably mounted in a rack-mountable housing to form unitary Flash-based memory unit.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: June 7, 2016
    Assignee: International Business Machines Corporation
    Inventors: Holloway H. Frost, Don D. Davis, Adrian P. Glover, Lance W. Shelton
  • Publication number: 20160085693
    Abstract: A Flash-based storage system, card, and/or module comprises a Flash controller configured to encrypt the data pages of a page stripe by shuffling the data pages, including loading each data page into a data shuffling buffer in a sequential order relative to other data pages in the page stripe, and thereafter unloading each data page in a non-sequential order relative to other data pages in the page stripe. The Flash controller is also configured to scramble the data pages of the page stripe by performing a bitwise logical operation on the data pages that are unloaded from the data shuffling buffer. A user key and one or more system keys are used to perform the shuffling and scrambling. The Flash controller is further configured to flush the user key by bypassing the system's backup power supply and performing an emergency system shutdown without backing up system data.
    Type: Application
    Filed: November 16, 2015
    Publication date: March 24, 2016
    Inventors: Holloway H. Frost, Charles J. Camp
  • Patent number: 9292206
    Abstract: Methods and apparatuses for optimizing the performance of a storage system comprise a FLASH storage system, a hard drive storage system, and a storage controller. The storage controller is adapted to receive READ and WRITE requests from an external host, and is coupled to the FLASH storage system and the hard drive storage system. The storage controller receives a WRITE request from an external host containing data and an address, forwards the received WRITE request to the FLASH storage system and associates the address provided in the WRITE request with a selected alternative address, and provides an alternative WRITE request, including the selected alternative address and the data received in the WRITE request, to the hard drive storage system, wherein the alternative address is selected to promote sequential WRITE operations within the hard drive storage system.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: March 22, 2016
    Assignee: International Business Machines Corporation
    Inventors: Holloway H. Frost, Daniel E. Scheel
  • Patent number: 9275750
    Abstract: Methods and apparatuses for reduction of read disturb errors in a memory system utilizing modified or extra memory cells.
    Type: Grant
    Filed: April 12, 2015
    Date of Patent: March 1, 2016
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Holloway H. Frost
  • Publication number: 20160034218
    Abstract: The disclosed embodiments are directed to methods and apparatuses for providing efficient and enhanced protection of data stored in a nonvolatile memory system. The methods and apparatuses involve a system controller for a plurality of nonvolatile memory devices in the nonvolatile memory system that is capable of protecting data using two layers of data protection, including inter-card card stripes and intra-card page stripes.
    Type: Application
    Filed: October 12, 2015
    Publication date: February 4, 2016
    Inventors: Holloway H. FROST, Charles J. CAMP, Kenneth SCIANNA, Lance W. SHELTON
  • Patent number: 9250991
    Abstract: Methods and apparatuses for reduction of Read Disturb errors in a NAND FLASH memory system comprise a controller configured to organize FLASH memory devices into blocks, each block having a plurality of pages, and each page defining an individually addressable physical memory location. The controller is further configured to accumulate a Block READ Count corresponding to the number of times any pages in a first block of pages have been read since the first block was last erased. Once the READ count reaches a predetermined number, the controller responds to subsequent READ requests for pages within the first block by moving data associated with a requested page to a page in a second, different block without moving data associated with other pages in the first block, and modifying a logical-to-physical translation table to associate the moved data with the physical address of the page in the second block.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: February 2, 2016
    Assignee: International Business Machines Corporation
    Inventors: Holloway H. Frost, Charles J. Camp, Timothy J. Fisher, James A. Fuxa, Lance W. Shelton
  • Publication number: 20150378819
    Abstract: Methods and apparatuses for enhanced protection of data stored in a non-volatile memory system involve a controller capable of adapting to the failure of one or more non-volatile memory devices in the memory system. The controller stores data in the form of page stripes, each page stripe composed of data pages, and each data page stored in a different non-volatile memory device. The controller also detects failure of a non-volatile memory device in which a data page of a particular page stripe is stored, reconstructs the data page, and stores the reconstructed data page in a new page stripe, where the number of data pages in the new page stripe is less than the number of data pages in the particular page stripe, and where no page of the new page stripe is stored in a memory location within the failed non-volatile memory device.
    Type: Application
    Filed: September 7, 2015
    Publication date: December 31, 2015
    Inventors: Holloway H. Frost, Charles J. Camp, James A. Fuxa
  • Publication number: 20150356044
    Abstract: The disclosed embodiments relate to a Flash-based memory module having high-speed serial communication. The Flash-based memory module comprises, among other things, a plurality of I/O modules, each configured to communicate with an external device over one or more external communication links, a plurality of Flash-based memory cards, each comprising a plurality of Flash memory devices, and a plurality of crossbar switching elements, each being connected to a respective one of the Flash-based memory cards and configured to allow each one of the I/O modules to communicate with the respective one of the Flash-based memory cards. Each I/O module is connected to each crossbar switching element by a high-speed serial communication link, and each crossbar switching element is connected to the respective one of the Flash-based memory cards by a plurality of parallel communication links.
    Type: Application
    Filed: August 17, 2015
    Publication date: December 10, 2015
    Inventors: Holloway H. FROST, Rebecca J. HUTSELL