Patents by Inventor Hong Chang
Hong Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240142175Abstract: Disclosed are an unblocking apparatus for a furnace discharging pipe and a use method. The unblocking apparatus includes a rail, a rail car that may move along the rail, an unblocking drive mechanism arranged on the rail car, a heat-unblocking component, a cold-unblocking component, and a material receiving component that is used to receive a blocking material in the discharging pipe, and a drive end of the unblocking drive mechanism is detachably connected with one end of the heat-unblocking component and the cold-unblocking component respectively. The present application effectively handles different blockage situations of the furnace discharging pipe by connecting the unblocking drive mechanism with an unblocking rod capable of heat-unblocking and a drilling rod capable of cold-unblocking, thereby two modes of heat-unblocking and cold-unblocking are performed on the furnace discharging pipe; and the discharging pipe may be unblocked by a remote operation.Type: ApplicationFiled: October 23, 2023Publication date: May 2, 2024Applicants: China Nuclear Sichuan Environmental Protection Engineering Co., Ltd., China Building Materials Academy, China Nuclear Power Engineering Co., Ltd.Inventors: Weidong XU, Yu CHANG, Yongchang ZHU, Hong DUAN, Chunyu TIAN, Wei WU, Debo YANG, Qingbin ZHAO, Shuaizhen WU, Lin WANG, Zhu CUI, Heyi GUO, Maosong FAN, Yuancheng SUN, Jie MEI, Xiaoli AN, Yongxiang ZHAO, Qinda LIU
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Patent number: 11967615Abstract: Embodiments of the present invention are directed to dual threshold voltage (VT) channel devices and their methods of fabrication. In an example, a semiconductor device includes a gate stack disposed on a substrate, the substrate having a first lattice constant. A source region and a drain region are formed on opposite sides of the gate electrode. A channel region is disposed beneath the gate stack and between the source region and the drain region. The source region is disposed in a first recess having a first depth and the drain region disposed in a second recess having a second depth. The first recess is deeper than the second recess. A semiconductor material having a second lattice constant different than the first lattice constant is disposed in the first recess and the second recess.Type: GrantFiled: December 23, 2015Date of Patent: April 23, 2024Assignee: Intel CorporationInventors: Hsu-Yu Chang, Neville L. Dias, Walid M. Hafez, Chia-Hong Jan, Roman W. Olac-Vaw, Chen-Guan Lee
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Patent number: 11963985Abstract: The present invention relates to a coral composite extract, a composition including the same and a method of producing the same. The coral composite extract includes at least two briarane-type diterpenoid compounds from corals of Briareum violaceum, B. excavatum and B. stechei, thereby being applied as an effective ingredient of a skin external use composition, a cosmetic composition and a medicinal composition.Type: GrantFiled: July 12, 2023Date of Patent: April 23, 2024Assignee: National Sun Yat-Sen UniversityInventors: Zhi-Hong Wen, Ping-Jyun Sung, Han-Chun Hung, Chun-Hong Chen, Yu-Chia Chang
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Publication number: 20240128341Abstract: The disclosure provides a semiconductor structure and a method of forming the same. The semiconductor structure includes a base pattern including a channel region and a drain region, a first semiconductor layer on the channel region of the base pattern, and a gate structure on the first semiconductor layer. The gate structure includes a first stack disposed on the first semiconductor layer and a second stack disposed on the first stack. The first stack includes a first sidewall adjacent to the drain region and a second sidewall opposite to the first sidewall in a first direction parallel to a top surface of the base pattern. The first sidewall is at a first distance from the second stack in the first direction, and the second sidewall is at a second distance from the second stack in the first direction. The first distance is greater than the second distance.Type: ApplicationFiled: December 14, 2022Publication date: April 18, 2024Applicant: Powerchip Semiconductor Manufacturing CorporationInventors: Chia-Hao Chang, Jih-Wen Chou, Hwi-Huang Chen, Hsin-Hong Chen, Yu-Jen Huang
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Publication number: 20240121523Abstract: A light-adjusting device having first regions and second regions is provided. The light-adjusting device includes pillars that form several groups of meta structures. The groups of meta structures correspond to the first regions, and from a top view, the first regions and the second regions are arranged in a checkerboard pattern.Type: ApplicationFiled: October 7, 2022Publication date: April 11, 2024Inventors: Kai-Hao CHANG, Chun-Yuan WANG, Shin-Hong KUO, Zong-Ru TU, Po-Hsiang WANG, Chih-Ming WANG
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Patent number: 11953803Abstract: Embodiments of the present application provide a method for controlling voltages of a liquid crystal on silicon (LCoS) two-dimensional array which includes a plurality of pixel sets, and the plurality of pixel sets include a first pixel set and a second pixel set. The method includes: determining a plurality of bit sequences, where the plurality of bit sequences include a first bit sequence and a second bit sequence; controlling a voltage of the first pixel set by using the first bit sequence; and controlling a voltage of the second pixel set by using the second bit sequence, where the first pixel set and the second pixel set are in different phase cycles in a port direction of the LCoS two-dimensional array, the first pixel set and the second pixel set have a same phase, and duty ratios of the first bit sequence and the second bit sequence are the same.Type: GrantFiled: February 25, 2022Date of Patent: April 9, 2024Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Zeshan Chang, Lei Mao, Liangjia Zong, Tong Li, Hong Yang
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Patent number: 11955336Abstract: Method of manufacturing a semiconductor device, includes forming a protective layer over substrate having a plurality of protrusions and recesses. The protective layer includes polymer composition including polymer having repeating units of one or more of: Wherein a, b, c, d, e, f, g, h, and i are each independently H, —OH, —ROH, —R(OH)2, —NH2, —NHR, —NR2, —SH, —RSH, or —R(SH)2, wherein at least one of a, b, c, d, e, f, g, h, and i on each repeating unit is not H. R, R1, and R2 are each independently a C1-C10 alkyl group, a C3-C10 cycloalkyl group, a C1-C10 hydroxyalkyl group, a C2-C10 alkoxy group, a C2-C10 alkoxy alkyl group, a C2-C10 acetyl group, a C3-C10 acetylalkyl group, a C1-C10 carboxyl group, a C2-C10 alkyl carboxyl group, or a C4-C10 cycloalkyl carboxyl group, and n is 2-1000. A resist layer is formed over the protective layer, and the resist layer is patterned.Type: GrantFiled: April 23, 2021Date of Patent: April 9, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jing Hong Huang, Wei-Han Lai, Ching-Yu Chang
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Patent number: 11955441Abstract: An interconnect structure comprises a first dielectric layer, a first metal layer, a second dielectric layer, a metal via, and a second metal layer. The first dielectric layer is over a substrate. The first metal layer is over the first dielectric layer. The first metal layer comprises a first portion and a second portion spaced apart from the first portion. The second dielectric layer is over the first metal layer. The metal via has an upper portion in the second dielectric layer, a middle portion between the first and second portions of the first metal layer, and a lower portion in the first dielectric layer. The second metal layer is over the metal via. From a top view the second metal layer comprises a metal line having longitudinal sides respectively set back from opposite sides of the first portion of the first metal layer.Type: GrantFiled: March 28, 2022Date of Patent: April 9, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jian-Hong Lin, Kuo-Yen Liu, Hsin-Chun Chang, Tzu-Li Lee, Yu-Ching Lee, Yih-Ching Wang
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Patent number: 11924965Abstract: A package component and forming method thereof are provided. The package component includes a substrate and a conductive layer. The substrate includes a first surface. The conductive layer is disposed over the first surface. The conductive layer includes a first conductive feature and a second conductive feature. The second conductive feature covers a portion of the first conductive feature. A resistance of the second conductive feature is lower than a resistance of the first conductive feature.Type: GrantFiled: April 25, 2022Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chun-Wei Chang, Jian-Hong Lin, Shu-Yuan Ku, Wei-Cheng Liu, Yinlung Lu, Jun He
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Patent number: 11923432Abstract: A method of manufacturing a semiconductor device includes forming a multi-layer stack of alternating first layers of a first semiconductor material and second layers of a second semiconductor material on a semiconductor substrate, forming a first recess through the multi-layer stack, and laterally recessing sidewalls of the second layers of the multi-layer stack. The sidewalls are adjacent to the first recess. The method further includes forming inner spacers with respective seams adjacent to the recessed second layers of the multi-layer stack and performing an anneal treatment on the inner spacers to close the respective seams.Type: GrantFiled: January 3, 2023Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yoh-Rong Liu, Wen-Kai Lin, Che-Hao Chang, Chi On Chui, Yung-Cheng Lu, Li-Chi Yu, Sen-Hong Syue
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Publication number: 20240067135Abstract: A sensor cleaning device includes a sensor cover configured to cover an outer surface of a sensor lens. The sensor cleaning device also includes a moving unit configured to support the sensor cover and move the sensor cover between a first position and a second position. The sensor lens is covered by the sensor cover positioned at the first position and uncovered by the sensor cover positioned at the second position. The sensor cleaning device also includes a cleaning unit configured to clean an outer surface of the sensor cover upon the sensor cover being moved to the second position.Type: ApplicationFiled: August 28, 2023Publication date: February 29, 2024Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATIONInventors: Ki Hong Lee, Jong Min Park, Seung Hyeok Chang
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Patent number: 11904581Abstract: A method for preparing a bifunctional film, including: (a) drying a first polymer solution to form a film to form an anti-adhesion layer, and (b) drying a second polymer solution over the anti-adhesion layer to form a film to form an attachment layer. The first polymer solution includes a first hydrophobic solution and a first hydrophilic solution, and in the first polymer solution, the weight ratio of the solute of the first hydrophobic solution to the solute of the first hydrophilic solution is 1:0.01-1. Moreover, the second polymer solution is composed of a second hydrophilic solution.Type: GrantFiled: August 11, 2022Date of Patent: February 20, 2024Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Hsin-Hsin Shen, Yu-Chi Wang, Ming-Chia Yang, Yu-Bing Liou, Wei-Hong Chang, Yun-Han Lin, Hsin-Yi Hsu, Yun-Chung Teng, Chia-Jung Lu, Yi-Hsuan Lee, Jian-Wei Lin, Kun-Mao Kuo, Ching-Mei Chen
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Publication number: 20240055527Abstract: A method of manufacturing a semiconductor device includes at least the following steps. A protrusion is formed in a substrate by an anisotropic etch process, wherein a sidewall of the protrusion is inclined. A recess is formed on the sidewall of the protrusion by an isotropic etch process, wherein during the isotropic etch process, a by-product covers a first portion of the sidewall of the protrusion while exposing a second portion of the sidewall of the protrusion, so that the recess is formed between the first portion and the second portion of the sidewall.Type: ApplicationFiled: October 25, 2023Publication date: February 15, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jiun-Ming Kuo, Hsin-Chih Chen, Che-Yuan Hsu, Kuo-Chin Liu, Han-Yu Tsai, You-Ting Lin, Jen-Hong Chang
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Publication number: 20240055508Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a doped nitride-based semiconductor layer, a gate electrode, and a protection layer. The doped nitride-based semiconductor layer has a first portion and a second portion over the first portion and narrower than the first portion. The gate electrode is disposed over the doped nitride-based semiconductor layer and narrower than the first portion. The protection layer is disposed over the doped nitride-based semiconductor layer and the gate electrode. A top surface of the first portion of the doped nitride-based semiconductor layer is covered by the protection layer, and a sidewall of the first portion of the doped nitride-based semiconductor layer is free from coverage by the protection layer.Type: ApplicationFiled: January 11, 2022Publication date: February 15, 2024Inventors: Jian RAO, Jheng-Sheng YOU, Weixing DU, Ming-Hong CHANG
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Patent number: 11888049Abstract: Semiconductor structures and methods of forming the same are provided. A method according to the present disclosure includes forming a stack of epitaxial layers over a substrate, forming a first fin-like structure and a second fin-like structure from the stack, forming an isolation feature between the first fin-like structure and the second fin-like structure, forming a cladding layer over the first fin-like structure and the second fin-like structure, conformally depositing a first dielectric layer over the cladding layer, depositing a second dielectric layer over the first dielectric layer, planarizing the first dielectric layer and the second dielectric layer until the cladding layer are exposed, performing an etch process to etch the second dielectric layer to form a helmet recess, performing a trimming process to trim the first dielectric layer to widen the helmet recess, and depositing a helmet feature in the widened helmet recess.Type: GrantFiled: December 8, 2022Date of Patent: January 30, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jen-Hong Chang, Yuan-Ching Peng, Chung-Ting Ko, Kuo-Yi Chao, Chia-Cheng Chao, You-Ting Lin, Chih-Chung Chang, Yi-Hsiu Liu, Jiun-Ming Kuo, Sung-En Lin
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Publication number: 20230396803Abstract: Disclosed herein is a method for encoding/decoding an immersive image, and the method for encoding an immersive image may include extracting an invalid region from an already encoded atlas and encoding a current atlas by referring to the invalid region.Type: ApplicationFiled: April 14, 2023Publication date: December 7, 2023Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Kwan Jung OH, Gwang Soon LEE, Hong Chang SHIN, Jun Young JEONG
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Patent number: 11838577Abstract: An audio and video transmission system includes a multimedia device. The multimedia device includes a high-definition multimedia interface (HDMI) receiver, a first transfer circuit, and a first universal serial bus type C (USB-C) interface. The first transfer circuit is configured to transfer a first audio signal output by an audio channel pin of the HDMI receiver into a second audio signal in a universal serial bus (USB) interface format. The first USB-C interface is configured to transmit the second audio signal. The HDMI audio channel pin is an audio return channel (ARC) pin or an enhanced ARC pin.Type: GrantFiled: August 18, 2021Date of Patent: December 5, 2023Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventors: Yakun Cai, Dafei Li, Hong Chang
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Patent number: 11838485Abstract: A method of producing an immersive video comprises decoding an atlas, parsing a flag for the atlas, and producing a viewport image using the atlas. The flag may indicate whether the viewport image is capable of being completely produced through the atlas, and, according to a value of the flag, when the viewport image is produced, it may be determined whether an additional atlas is used in addition to the atlas.Type: GrantFiled: April 16, 2021Date of Patent: December 5, 2023Assignee: Electronics and Telecommunications Research InstituteInventors: Gwang Soon Lee, Jun Young Jeong, Kug Jin Yun, Hong Chang Shin, Ho Min Eum
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Publication number: 20230386090Abstract: An image encoding method according to the present disclosure may include classifying a plurality of view images into a basic image and an additional image; performing pruning for at least one of the plurality of view images based on a result of the classification; generating an atlas based on a result of performing the pruning; and encoding the atlas and metadata for the atlas. In this case, the metadata may include spherical harmonic function information on a point in a three-dimensional space.Type: ApplicationFiled: May 25, 2023Publication date: November 30, 2023Applicant: Electronics and Telecommunications Research InstituteInventors: Hong Chang SHIN, Gwang Soon LEE, Kwan Jung OH, Jun Young JEONG
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Patent number: 11830948Abstract: A semiconductor device includes a semiconductor substrate, at least one semiconductor fin and a gate stack. The semiconductor fin is disposed on the semiconductor substrate. The semiconductor fin includes a first portion, a second portion and a first neck portion between the first portion and the second portion. A width of the first portion decreases as the first portion becomes closer to the first neck portion, and a width of the second portion increases as the second portion becomes closer to a bottom surface of the semiconductor substrate. The gate stack partially covers the semiconductor fin.Type: GrantFiled: September 14, 2020Date of Patent: November 28, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jiun-Ming Kuo, Hsin-Chih Chen, Che-Yuan Hsu, Kuo-Chin Liu, Han-Yu Tsai, You-Ting Lin, Jen-Hong Chang