Patents by Inventor Hong Lou

Hong Lou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240168024
    Abstract: The present disclosure provides a biomarker for detecting lung cancer and use thereof. A proteomics method is used to analyze a protein with significant differences in blood of a patient with lung cancer and normal people, such that a series of biomarkers capable of early predicting an occurrence risk of lung cancer are screened out, a group of biomarkers are further screened to construct a diagnosis model for lung cancer, and the model may be used for conveniently, non-invasively and effectively predicting whether an individual suffers from lung cancer or not, and meets clinical needs.
    Type: Application
    Filed: August 28, 2023
    Publication date: May 23, 2024
    Inventors: Junli GAO, Junshun GAO, Xiaojun PENG, Weixin WANG, Qinqin LOU, Hong GUAN
  • Publication number: 20240123158
    Abstract: The present disclosure provides a shielding apparatus for a lower end of an injection needle and an injection device, and relates to the technical field of injection instruments. By using the shielding apparatus for a lower end of an injection needle in the present disclosure, in the process of mounting a needle holder on an insulin pen, and when the injection needle is completely removed from the insulin pen, the limit block also moves downwardly to abut against a bottom wall of the moving groove, and the shielding cylinder completely covers the lower end of the injection needle, so as to avoid a situation that a user accidentally touches the lower end of an injection needle to be injured, thereby avoiding the safety risk when the lower end of the injection needle is removed.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Inventors: Hong Chen, Xu Chen, Qian Zhang, Zhongshichao Chi, Zhuoyuan Lou
  • Publication number: 20240075217
    Abstract: The present disclosure provides a safe puncture needle, and relates to the technical field of medical devices, which comprises a needle holder, a base and a needle tubing, wherein the needle tubing comprises a needle tubing body and a needle tubing tip having a bent structure, the base comprises a base body and a guide block, the base body is provided with a second inner space, the base body is provided with a first through-hole and a second through-hole communicating with the second inner space, the guide block is provided with a third through-hole, the needle tubing body passes through the first through-hole and the third through-hole and is slidably connected to the guide block, and the needle tubing tip retracts from the second through-hole.
    Type: Application
    Filed: July 18, 2023
    Publication date: March 7, 2024
    Inventors: Xu Chen, Qian Zhang, Hong Chen, Yuanxian Zheng, Zhongshichao Chi, Zhuoyuan Lou
  • Patent number: 11626858
    Abstract: The invention provides a system improving signal handling, e.g., transmission and/or processing. In an embodiment, the system may include a filter circuit, a magnitude bit truncation circuit and a utility circuit. The filter circuit may be coupled to a target signal which contains one or more desired signals at one or more interested bands, for attenuating each said interested band to form a filtered signal. The magnitude bit truncation circuit may be coupled to the filter circuit, for truncating one or more bits of each sample of the filtered signal to form a truncated signal. The utility circuit may be coupled to the magnitude bit truncation circuit, for handling the truncated signal to implement handling of the target signal, so as to reduce resource requirement and enhance error tolerance comparing with directly handling the target signal.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: April 11, 2023
    Assignee: MediaTek Inc.
    Inventors: Jen-Huan Tsai, Chih-Hong Lou
  • Patent number: 11526186
    Abstract: A low-dropout regulator (LDO) capable of providing high power-supply rejection ratio (PSRR) and good reverse isolation. The LDO may include a core circuitry and a reverse isolation circuitry. The core circuitry may include a PSRR circuitry coupled to an output node and configured to provide high PSRR at the output node. The reverse isolation circuitry may be configured to provide good reverse isolation at the output node by, for example, providing current in response to ripples at the output node. The reverse isolation circuitry may be configured with bandwidth higher than that of the core circuitry such that it can provide fast transient response. The reverse isolation circuitry may be configurable and/or reconfigurable for a desirable reverse isolation performance. The reverse isolation circuitry may be configurable and/or reconfigurable to trade off between power consumed by the reverse isolation circuitry and a leakage current flowing through the core circuitry.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: December 13, 2022
    Assignee: MediaTek Inc.
    Inventors: Po-Jung Chang, Yan-Jiun Chen, Chih-Hong Lou
  • Publication number: 20210265982
    Abstract: The invention provides a system improving signal handling, e.g., transmission and/or processing. In an embodiment, the system may include a filter circuit, a magnitude bit truncation circuit and a utility circuit. The filter circuit may be coupled to a target signal which contains one or more desired signals at one or more interested bands, for attenuating each said interested band to form a filtered signal. The magnitude bit truncation circuit may be coupled to the filter circuit, for truncating one or more bits of each sample of the filtered signal to form a truncated signal. The utility circuit may be coupled to the magnitude bit truncation circuit, for handling the truncated signal to implement handling of the target signal, so as to reduce resource requirement and enhance error tolerance comparing with directly handling the target signal.
    Type: Application
    Filed: March 9, 2021
    Publication date: August 26, 2021
    Applicant: MediaTek Inc.
    Inventors: Jen-Huan Tsai, Chih-Hong Lou
  • Publication number: 20210216092
    Abstract: A low-dropout regulator (LDO) capable of providing high power-supply rejection ratio (PSRR) and good reverse isolation. The LDO may include a core circuitry and a reverse isolation circuitry. The core circuitry may include a PSRR circuitry coupled to an output node and configured to provide high PSRR at the output node. The reverse isolation circuitry may be configured to provide good reverse isolation at the output node by, for example, providing current in response to ripples at the output node. The reverse isolation circuitry may be configured with bandwidth higher than that of the core circuitry such that it can provide fast transient response. The reverse isolation circuitry may be configurable and/or reconfigurable for a desirable reverse isolation performance. The reverse isolation circuitry may be configurable and/or reconfigurable to trade off between power consumed by the reverse isolation circuitry and a leakage current flowing through the core circuitry.
    Type: Application
    Filed: October 7, 2020
    Publication date: July 15, 2021
    Applicant: MediaTek Inc.
    Inventors: Po-Jung Chang, Yan-Jiun Chen, Chih-Hong Lou
  • Patent number: 10979030
    Abstract: The invention provides a system improving signal handling, e.g., transmission and/or processing. In an embodiment, the system may include a filter circuit, a magnitude bit truncation circuit and a utility circuit. The filter circuit may be coupled to a target signal which contains one or more desired signals at one or more interested bands, for attenuating each said interested band to form a filtered signal. The magnitude bit truncation circuit may be coupled to the filter circuit, for truncating one or more bits of each sample of the filtered signal to form a truncated signal. The utility circuit may be coupled to the magnitude bit truncation circuit, for handling the truncated signal to implement handling of the target signal, so as to reduce resource requirement and enhance error tolerance comparing with directly handling the target signal.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: April 13, 2021
    Assignee: MediaTek Inc.
    Inventors: Jen-Huan Tsai, Chih-Hong Lou
  • Patent number: 10579084
    Abstract: A voltage regulator apparatus includes operational amplifier, first resistor, second resistor, driving transistor, amplifier circuit, and output circuit. The operational amplifier has first input terminal coupled to reference voltage, second input terminal, and output terminal. The first resistor has first terminal coupled to second input terminal. The second resistor is coupled between first resistor and ground level. The driving transistor has control terminal coupled to output terminal of operational amplifier and first terminal coupled to second terminal of first resistor. The amplifier circuit is coupled to output terminal of operational amplifier and configured to sense output voltage of voltage regulator apparatus to amplify the sensed voltage with specific gain to regulate a transistor of output circuit. The transistor has control terminal controlled by amplifier circuit. The output voltage is generated at first terminal of the transistor.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: March 3, 2020
    Assignee: MEDIATEK INC.
    Inventors: Kuan-Chun Chen, Chih-Hong Lou
  • Publication number: 20190235543
    Abstract: A voltage regulator apparatus includes operational amplifier, first resistor, second resistor, driving transistor, amplifier circuit, and output circuit. The operational amplifier has first input terminal coupled to reference voltage, second input terminal, and output terminal. The first resistor has first terminal coupled to second input terminal. The second resistor is coupled between first resistor and ground level. The driving transistor has control terminal coupled to output terminal of operational amplifier and first terminal coupled to second terminal of first resistor. The amplifier circuit is coupled to output terminal of operational amplifier and configured to sense output voltage of voltage regulator apparatus to amplify the sensed voltage with specific gain to regulate a transistor of output circuit. The transistor has control terminal controlled by amplifier circuit. The output voltage is generated at first terminal of the transistor.
    Type: Application
    Filed: November 6, 2018
    Publication date: August 1, 2019
    Inventors: Kuan-Chun Chen, Chih-Hong Lou
  • Publication number: 20190068170
    Abstract: The invention provides a system improving signal handling, e.g., transmission and/or processing. In an embodiment, the system may include a filter circuit, a magnitude bit truncation circuit and a utility circuit. The filter circuit may be coupled to a target signal which contains one or more desired signals at one or more interested bands, for attenuating each said interested band to form a filtered signal. The magnitude bit truncation circuit may be coupled to the filter circuit, for truncating one or more bits of each sample of the filtered signal to form a truncated signal. The utility circuit may be coupled to the magnitude bit truncation circuit, for handling the truncated signal to implement handling of the target signal, so as to reduce resource requirement and enhance error tolerance comparing with directly handling the target signal.
    Type: Application
    Filed: July 25, 2018
    Publication date: February 28, 2019
    Inventors: Jen-Huan Tsai, Chih-Hong Lou
  • Patent number: 9871534
    Abstract: An exemplary quantizer includes a multi-bit analog-to-digital converter (ADC) and a first digital-to-analog converter (DAC) feedback circuit. The multi-bit ADC has an internal DAC associated with comparison of each sampled analog input of the multi-bit ADC. The multi-bit ADC converts a currently-sampled analog input into a first digital output. A first noise-shaped truncation output is derived from the first digital output. The first DAC feedback circuit transfers a first truncation residue associated with the first noise-shaped truncation output to the internal DAC. The transferred first truncation residue is reflected in comparison of a later-sampled analog input of the multi-bit ADC via the internal DAC.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: January 16, 2018
    Assignee: MEDIATEK INC.
    Inventors: Jen-Huan Tsai, Chih-Hong Lou
  • Publication number: 20170353192
    Abstract: An exemplary quantizer includes a multi-bit analog-to-digital converter (ADC) and a first digital-to-analog converter (DAC) feedback circuit. The multi-bit ADC has an internal DAC associated with comparison of each sampled analog input of the multi-bit ADC. The multi-bit ADC converts a currently-sampled analog input into a first digital output. A first noise-shaped truncation output is derived from the first digital output. The first DAC feedback circuit transfers a first truncation residue associated with the first noise-shaped truncation output to the internal DAC. The transferred first truncation residue is reflected in comparison of a later-sampled analog input of the multi-bit ADC via the internal DAC.
    Type: Application
    Filed: April 27, 2017
    Publication date: December 7, 2017
    Inventors: Jen-Huan Tsai, Chih-Hong Lou
  • Patent number: 9806725
    Abstract: A PLL includes a phase frequency detector (PFD), a charge pump, a capacitor coupled to the charge pump, an analog-to-digital convertor (ADC), a noise canceller, an accumulator, a loop filter, an oscillator, a digital block and a frequency divider. The PFD detects a phase difference between a reference signal and a divided signal. The charge pump generates a charge pump signal in response to the phase difference. The ADC converts the charge pump signal to a first digital signal, and quantizes it to a second digital signal. The noise canceller forms a shaped noise signal according to the first and second digital signals, and eliminates the shaped noise signal at the output of the noise canceller to generate a noise cancelled signal. The accumulator accumulates the noise cancelled signal. The loop filter filters the accumulated signal. The oscillator provides an output oscillating signal in response to the filtered signal.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: October 31, 2017
    Assignee: MEDIATEK INC.
    Inventors: Yi-Jhan Sie, Po-Min Wang, Chih-Hong Lou
  • Publication number: 20170063385
    Abstract: A PLL includes a phase frequency detector (PFD), a charge pump, a capacitor coupled to the charge pump, an analog-to-digital convertor (ADC), a noise canceller, an accumulator, a loop filter, an oscillator, a digital block and a frequency divider. The PFD detects a phase difference between a reference signal and a divided signal. The charge pump generates a charge pump signal in response to the phase difference. The ADC converts the charge pump signal to a first digital signal, and quantizes it to a second digital signal. The noise canceller forms a shaped noise signal according to the first and second digital signals, and eliminates the shaped noise signal at the output of the noise canceller to generate a noise cancelled signal. The accumulator accumulates the noise cancelled signal. The loop filter filters the accumulated signal. The oscillator provides an output oscillating signal in response to the filtered signal.
    Type: Application
    Filed: April 20, 2016
    Publication date: March 2, 2017
    Inventors: Yi-Jhan Sie, Po-Min Wang, Chih-Hong Lou
  • Patent number: 9503038
    Abstract: A current controlling device includes: a first resistive circuit arranged to selectively conduct a first current to a first output terminal from a first input terminal; and a second resistive circuit arranged to selectively conduct a second current to a second output terminal from the first input terminal; wherein when the first resistive circuit conducts the first current to the first output terminal and when the second resistive circuit does not conduct the second current to the second output terminal, the first input terminal has a first input impedance; when the first resistive circuit does not conduct the first current to the first output terminal and when the second resistive circuit conducts the second current to the second output terminal, the first input terminal has a second input impedance substantially equal to the first input impedance.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: November 22, 2016
    Assignee: MEDIATEK INC.
    Inventors: Min-Hua Wu, Chih-Hong Lou, Yen-Chuan Huang, Chi-Yun Wang
  • Patent number: 9484877
    Abstract: A resonating device includes: an amplifying circuit having a first input terminal, and an output terminal for outputting an output signal; a first feedback circuit coupled between the first input terminal and the output terminal of the amplifying circuit; a second feedback circuit, coupled between the first input terminal and the output terminal of the amplifying circuit; and a gain adjusting circuit, having an input terminal for receiving an input signal, and a first output terminal coupled to the first input terminal of the amplifying circuit; wherein a first equivalent impedance on a first intermediate terminal in the first feedback circuit substantially equals a second equivalent impedance on a second intermediate terminal in the second feedback circuit, and the gain adjusting circuit is arranged to tune a transfer function from the input signal to the output signal.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: November 1, 2016
    Assignee: MEDIATEK INC.
    Inventors: Chi-Yun Wang, Chih-Hong Lou, Yen-Chuan Huang, Li-Han Hung
  • Patent number: 9312879
    Abstract: A signal modulating device includes: an integrating circuit arranged to generate an integrated signal according to a scaled analog signal and a first feedback signal; a resonating circuit arranged to generate a resonating signal according to the integrated signal; a first signal converting circuit arranged to convert the resonating signal into a digital output signal; a second signal converting circuit arranged to convert the digital output signal into the first feedback signal; and a first impedance circuit having a first terminal receiving an analog signal and a second terminal coupled to the resonating circuit for altering the location of zeros in the forward-path transfer function and consequently shaping the signal transfer function (STF) of the signal modulating device; and a second impedance circuit having a first terminal receiving the analog signal and a second terminal coupled to the integrating circuit for generating the scaled analog signal.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: April 12, 2016
    Assignee: MEDIATEK INC.
    Inventors: Li-Han Hung, Yen-Chuan Huang, Chi-Yun Wang, Chih-Hong Lou
  • Publication number: 20160056835
    Abstract: A signal modulating device includes: an integrating circuit arranged to generate an integrated signal according to a scaled analog signal and a first feedback signal; a resonating circuit arranged to generate a resonating signal according to the integrated signal; a first signal converting circuit arranged to convert the resonating signal into a digital output signal; a second signal converting circuit arranged to convert the digital output signal into the first feedback signal; and a first impedance circuit having a first terminal receiving an analog signal and a second terminal coupled to the resonating circuit for altering the location of zeros in the forward-path transfer function and consequently shaping the signal transfer function (STF) of the signal modulating device; and a second impedance circuit having a first terminal receiving the analog signal and a second terminal coupled to the integrating circuit for generating the scaled analog signal.
    Type: Application
    Filed: January 20, 2015
    Publication date: February 25, 2016
    Inventors: Li-Han Hung, Yen-Chuan Huang, Chi-Yun Wang, Chih-Hong Lou
  • Publication number: 20160056783
    Abstract: A resonating device includes: an amplifying circuit having a first input terminal, and an output terminal for outputting an output signal; a first feedback circuit coupled between the first input terminal and the output terminal of the amplifying circuit; a second feedback circuit, coupled between the first input terminal and the output terminal of the amplifying circuit; and a gain adjusting circuit, having an input terminal for receiving an input signal, and a first output terminal coupled to the first input terminal of the amplifying circuit; wherein a first equivalent impedance on a first intermediate terminal in the first feedback circuit substantially equals a second equivalent impedance on a second intermediate terminal in the second feedback circuit, and the gain adjusting circuit is arranged to tune a transfer function from the input signal to the output signal.
    Type: Application
    Filed: August 25, 2014
    Publication date: February 25, 2016
    Inventors: Chi-Yun Wang, Chih-Hong Lou, Yen-Chuan Huang, Li-Han Hung