Abstract: An overvoltage protection circuit configured to prevent an overvoltage of an output voltage of a switching converter, can include: an output voltage simulation circuit configured to generate an output voltage simulation signal according to circuit parameters of the switching converter, where the output voltage simulation signal changes along with the output voltage; and an overvoltage signal generator configured to activate an overvoltage signal when a feedback voltage is less than a first threshold value and the output voltage simulation signal is greater than a second threshold value.

Abstract: An overvoltage protection circuit configured to prevent an overvoltage of an output voltage of a switching converter, can include: an output voltage simulation circuit configured to generate an output voltage simulation signal according to circuit parameters of the switching converter, where the output voltage simulation signal changes along with the output voltage; and an overvoltage signal generator configured to activate an overvoltage signal when a feedback voltage is less than a first threshold value and the output voltage simulation signal is greater than a second threshold value.

Abstract: An overvoltage protection circuit configured to prevent an overvoltage of an output voltage of a switching converter, can include: an output voltage simulation circuit configured to generate an output voltage simulation signal according to circuit parameters of the switching converter, where the output voltage simulation signal changes along with the output voltage; and an overvoltage signal generator configured to activate an overvoltage signal when a feedback voltage is less than a first threshold value and the output voltage simulation signal is greater than a second threshold value.

Abstract: A system can include: a plurality of Type-C ports configured to connect with a plurality of external devices; a plurality of power conversion circuits having a dual-directional power transmission function, where each power conversion circuit is connected between a power supply terminal of the system and a corresponding Type-C port, in order to perform voltage conversion; and where each power conversion circuit is controlled to operate in different modes according to power information of each of the plurality of external devices.

Abstract: A clock dividing frequency circuit can include: a controlled current source configured to generate a driving current that varies with a dividing frequency control signal; a ramp signal generating circuit configured to generate a ramp signal having a slope that varies according to the driving current, where the ramp signal is reset according to pulses of a dividing frequency clock signal; and a dividing frequency pulse generating circuit configured to generate the dividing frequency clock signal by a dividing frequency operation according to the ramp signal and a system clock signal.

Abstract: An overvoltage protection circuit configured to prevent an overvoltage of an output voltage of a switching converter, can include: an output voltage simulation circuit configured to generate an output voltage simulation signal according to circuit parameters of the switching converter, where the output voltage simulation signal changes along with the output voltage; and an overvoltage signal generator configured to activate an overvoltage signal when a feedback voltage is less than a first threshold value and the output voltage simulation signal is greater than a second threshold value.

Abstract: A clock dividing frequency circuit can include: a controlled current source configured to generate a driving current that varies with a dividing frequency control signal; a ramp signal generating circuit configured to generate a ramp signal having a slope that varies according to the driving current, where the ramp signal is reset according to pulses of a dividing frequency clock signal; and a dividing frequency pulse generating circuit configured to generate the dividing frequency clock signal by a dividing frequency operation according to the ramp signal and a system clock signal.

Abstract: An LED driver described herein can determine whether it is operating in z soft-start process by comparing a first threshold value and a soft-start reference value. In the soft-start process, the inductor current and the LED driving current can be soft-started periodically to effectively avoid current overshoot. In addition, the end of the soft-tart operation can be controlled based on a comparison result of the first threshold value and the reference value of the soft-start, and without any external settings. Thus, the end of soft-start operation can automatically be determined with strong controllability.