Patents by Inventor Horatio Seymour Wildman
Horatio Seymour Wildman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7772866Abstract: Embodiments of the present invention provide a test structure for inspection of integrated circuits. The test structure may be fabricated on a semiconductor wafer together with one or more integrated circuits. The test structure may include a common reference point for voltage reference; a plurality of voltage dropping devices being connected to the common reference point; and a plurality of electron-collecting pads being connected, respectively, to a plurality of contact points of the plurality of voltage dropping devices. A brightness shown by the plurality of electron-collecting pads during an inspection of the integrated circuits may be associated with a pre-determined voltage.Type: GrantFiled: March 7, 2007Date of Patent: August 10, 2010Assignees: International Business Machines Corporation, Samsung Electronics Co., Ltd.Inventors: Oliver D. Patterson, Horatio Seymour Wildman, Min-Chul Sun
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Publication number: 20080217612Abstract: Embodiments of the present invention provide a test structure for inspection of integrated circuits. The test structure may be fabricated on a semiconductor wafer together with one or more integrated circuits. The test structure may include a common reference point for voltage reference; a plurality of voltage dropping devices being connected to the common reference point; and a plurality of electron-collecting pads being connected, respectively, to a plurality of contact points of the plurality of voltage dropping devices. A brightness shown by the plurality of electron-collecting pads during an inspection of the integrated circuits may be associated with a pre-determined voltage.Type: ApplicationFiled: March 7, 2007Publication date: September 11, 2008Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, SAMSUNG ELECTRONICS CO., LTD.Inventors: Oliver D. Patterson, Horatio Seymour Wildman, Min-Chul Sun
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Patent number: 6784485Abstract: A semiconductor device containing a diffusion barrier layer is provided. The semiconductor device includes at least a semiconductor substrate containing conductive metal elements; and, a diffusion barrier layer applied to at least a portion of the substrate in contact with the conductive metal elements, the diffusion barrier layer having an upper surface and a lower surface and a central portion, and being formed from silicon, carbon, nitrogen and hydrogen with the nitrogen being non-uniformly distributed throughout the diffusion barrier layer. Thus, the nitrogen is more concentrated near the lower and upper surfaces of the diffusion barrier layer as compared to the central portion of the diffusion barrier layer. Methods for making the semiconductor devices are also provided.Type: GrantFiled: February 11, 2000Date of Patent: August 31, 2004Assignee: International Business Machines CorporationInventors: Stephan Alan Cohen, Timothy Joseph Dalton, John Anthony Fitzsimmons, Stephen McConnell Gates, Lynne M. Gignac, Paul Charles Jamison, Kang-Wook Lee, Sampath Purushothaman, Darryl D. Restaino, Eva Simonyi, Horatio Seymour Wildman
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Patent number: 6726996Abstract: A diffusion barrier that has a low dielectric constant, k, yet resistant to oxygen and/or moisture permeability is provided. The diffusion barrier includes a dielectric stack having at least two or more dielectric films, each film having a dielectric constant of about 8 or less, wherein the dielectric stack comprises alternating films composed of a high-permeability material and a low-permeability material. A semiconductor structure including substrate having at least one wiring region and the inventive diffusion barrier formed on a surface of the substrate is also provided.Type: GrantFiled: May 16, 2001Date of Patent: April 27, 2004Assignee: International Business Machines CorporationInventors: Edward Paul Barth, Stephan A. Cohen, Chester Dziobkowski, John Anthony Fitzsimmons, Stephen McConnell Gates, Thomas Henry Ivers, Sampath Purushothaman, Darryl D. Restaino, Horatio Seymour Wildman
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Publication number: 20040077140Abstract: A uniformly thick oxide film on a substrate is formed by using an anodization apparatus which deposits a blanket precursor film on a surface of a substrate; provides electrical contact to the precursor film; moves the precursor film into contact with an electrolyte solution such that substantially all electrically conductive surfaces, e.g., pin contacts, the substrate edge and a backside of the substrate are electrically isolated from the electrolyte; ensures that the surface of the precursor film on the substrate is in direct contact with the electrolyte solution; and which applies an anodizing current and/or voltage between the precursor film and a counter electrode so as to compensate for a voltage drop resulting from the presence of the electrolyte.Type: ApplicationFiled: October 16, 2002Publication date: April 22, 2004Inventors: Panayotis C. Andricacos, Roy Arthur Carruthers, Stephan Alan Cohen, John Michael Cotte, Lynne M. Gignac, Kenneth Jay Stein, Keith T. Kwietniak, Seshadri Subbanna, Horatio Seymour Wildman, David Earle Seeger, Andrew Herbert Simon
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Patent number: 6646345Abstract: A method for forming a quaternary alloy film of Co—W—P—Au for use as a diffusion barrier layer on a copper interconnect in a semiconductor structure and devices formed incorporating such film are disclosed. In the method, a substrate that has copper conductive regions on top is first pre-treated by two separate pre-treatment steps. In the first step, the substrate is immersed in a H2SO4 rinsing solution and next in a solution containing palladium ions for a length of time sufficient for the ions to deposit on the surface of the copper conductive regions. The substrate is then immersed in a solution that contains at least 15 gr/l sodium citrate or EDTA for removing excess palladium ions from the surface of the copper conductive regions.Type: GrantFiled: September 27, 2001Date of Patent: November 11, 2003Assignee: International Business Machines CorporationInventors: Carlos Juan Sambucetti, Judith Marie Rubino, Daniel Charles Edelstein, Cyryl Cabral, Jr., George Frederick Walker, John G Gaudiello, Horatio Seymour Wildman
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Publication number: 20020172811Abstract: A diffusion barrier that has a low dielectric constant, k, yet resistant to oxygen and/or moisture permeability is provided. The diffusion barrier includes a dielectric stack having at least two or more dielectric films, each film having a dielectric constant of about 8 or less, wherein the dielectric stack comprises alternating films composed of a high-permeability material and a low-permeability material. A semiconductor structure including substrate having at least one wiring region and the inventive diffusion barrier formed on a surface of the substrate is also provided.Type: ApplicationFiled: May 16, 2001Publication date: November 21, 2002Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Edward Paul Barth, Stephan A. Cohen, Chester Dziobkowski, John Anthony Fitzsimmons, Stephen McConnell Gates, Thomas Henry Ivers, Sampath Purushothaman, Darryl D. Restaino, Horatio Seymour Wildman
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Publication number: 20020123220Abstract: A method for forming a quaternary alloy film of Co—W—P—Au for use as a diffusion barrier layer on a copper interconnect in a semiconductor structure and devices formed incorporating such film are disclosed. In the method, a substrate that has copper conductive regions on top is first pre-treated by two separate pre-treatment steps. In the first step, the substrate is immersed in a H2SO4 rinsing solution and next in a solution containing palladium ions for a length of time sufficient for the ions to deposit on the surface of the copper conductive regions. The substrate is then immersed in a solution that contains at least 15 gr/l sodium citrate or EDTA for removing excess palladium ions from the surface of the copper conductive regions.Type: ApplicationFiled: September 27, 2001Publication date: September 5, 2002Applicant: International Business Machines CorporationInventors: Carlos Juan Sambucetti, Judith Marie Rubino, Daniel Charles Edelstein, Cyryl Cabral, George Frederick Walker, John G. Gaudiello, Horatio Seymour Wildman
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Patent number: 6323128Abstract: A method for forming a quaternary alloy film of Co—W—P—Au for use as a diffusion barrier layer on a copper interconnect in a semiconductor structure and devices formed incorporating such film are disclosed. In the method, a substrate that has copper conductive regions on top is first pre-treated by two separate pre-treatment steps. In the first step, the substrate is immersed in a H2SO4 rinsing solution and next in a solution containing palladium ions for a length of time sufficient for the ions to deposit on the surface of the copper conductive regions. The substrate is then immersed in a solution that contains at least 15 gr/l sodium citrate or EDTA for removing excess palladium ions from the surface of the copper conductive regions.Type: GrantFiled: May 26, 1999Date of Patent: November 27, 2001Assignee: International Business Machines CorporationInventors: Carlos Juan Sambucetti, Judith Marie Rubino, Daniel Charles Edelstein, Cyryl Cabral, Jr., George Frederick Walker, John G Gaudiello, Horatio Seymour Wildman