Abstract: A method for packaging micromachined devices fabricated by MEMS and semiconductor process is disclosed in this invention. The method employed etching technique to etch a trench surrounding the micromachined components on each chip of the first wafer down to the bottom interconnection metal layer. The said trench can accommodate the solder of flip-chip packaging. On each chip of the second wafer, or called as the second chip, a surrounding copper pillar wall corresponding to the trench on the first chip is deposited. By wafer-level packaging, the trench on the first chip is aligned to the pillar wall, and then bonded together with elevated temperature. The face-to-face chamber formed between two chips can allow the movement of the micromachined structures. Further, the signal or power connections between two chips can be established by providing several discrete pillar bumps.

Abstract: A structure and method of forming pillar bumps with controllable shape and size are provided, which use polishing planarization technology to eliminate shape difference among pillar bumps on a wafer and die, thus yield the pillar bumps with design shape and size.

Abstract: This invention disclosed a method to strengthen structure and enhance sensitivity for CMOS-MEMS micro-machined devices which include micro-motion sensor, micro-actuator and RF switch. The steps of the said method contain defining deposited region by metal and passivation layer, forming a cavity for depositing metal structure by lithography process, depositing metal structure on the top metal layer of micromachined structure by Electroless plating, polishing process and etching process. The method aims at strengthening structures and minimizing CMOS-MEMS device size. Furthermore, this method can also be applied to inertia sensors such as accelerometer or gyroscope, which can enhance sensitivity and capacitive value, and deal with curl issues for suspended CMOS-MEMS devices.

Abstract: A method for packaging micromachined devices fabricated by MEMS and semiconductor process is disclosed in this invention. The method employed etching technique to etch a trench surrounding the micromachined components on each chip of the first wafer down to the bottom interconnection metal layer. The said trench can accommodate the solder of flip-chip packaging. On each chip of the second wafer, or called as the second chip, a surrounding copper pillar wall corresponding to the trench on the first chip is deposited. By wafer-level packaging, the trench on the first chip is aligned to the pillar wall, and then bonded together with elevated temperature. The face-to-face chamber formed between two chips can allow the movement of the micromachined structures. Further, the signal or power connections between two chips can be established by providing several discrete pillar bumps.

Abstract: A MEMS-based fabrication process is disclosed to fabricate a hollow seamless drug-eluting stent. This stent fabrication process is characterized by using a photolithography process, a composite electroplating process, and a polishing process to mass-produce drug-eluting seamless stents. Combining a multi-layers photolithography process with a multi-layers composite electroforming process could make the formation of micro-holes, micro-caves, or micro-trenches integrated with this hollow seamless eluting-stent for any anti-thrombosis drug loading or filling.

Abstract: This invention is characteristic of combining an electroplating process with a polishing process to uniformly fabricate multi-layer flip chip copper pillar. All kinds of flip chip copper pillar with varied shapes and sizes are able to be defined by using multi-layer photolithography process commonly utilized in the semiconductor processes. After that, use both exposure and alignment procedures to accurately define multi-layer photoresist's patterns on the substrate. Some designated metallic materials are then electroplated on those completed well-defined patterns during the last photolithography process by means of an electroplating process. A polishing process follows the electroplating to level the rugged solder bumps, resulted from the impact on the certain changeable and inevitable electroplating parameters.