Abstract: A method and an apparatus are provided for parallel fault detection. The method comprises receiving data associated with processing of a workpiece by a first processing tool, receiving data associated with processing of a workpiece by a second processing tool and comparing at least a portion of the received data to a common fault model to determine if a fault associated with at least one of the processing of the workpiece by the first processing tool and processing of the workpiece by the second processing tool occurred.

Abstract: A method and apparatus is provided for fault detection spanning multiple processes. The method comprises receiving operational data associated with a first process, receiving operational data associated with a second process, which is downstream to the first process and performing fault detection analysis based on the operational data associated with the first process and second process using a common fault detection unit.

Abstract: The present invention is generally directed to an advanced process control of the manufacture of memory devices, and a system for accomplishing same. In one illustrative embodiment, the method comprises performing at least one process operation to form at least one layer of an oxide-nitride-oxide stack of a memory cell, the stack being comprised of a first layer of oxide positioned above a first layer of polysilicon, a layer of silicon nitride positioned above the first layer of oxide, and a second layer of oxide positioned above the layer of silicon nitride. The method further comprises measuring at least one characteristic of at least one of the first layer of polysilicon, the first oxide layer, the layer of silicon nitride, and the second layer of oxide and adjusting at least one parameter of at least one process operation used to form at least one of the first oxide layer, the layer of silicon nitride and the second oxide layer if the measured at least one characteristic is not within acceptable limits.

Abstract: Methods of using dynamic metrology sampling techniques for identified lots, and a system for performing such methods are disclosed. In one illustrative embodiment, the method comprises identifying at least one wafer to be processed, identifying a process tool in which at least one wafer is to be processed, obtaining enhanced metrology data regarding a process operation to be performed in the identified process tool prior to processing the identified at least one wafer in the identified process tool, and positioning at least one wafer in the identified process tool and performing the process operation thereon.

Abstract: The present invention is generally directed to various methods of processing substrates based upon the substrate orientation. In one embodiment, the method comprises determining a defective die pattern of a process tool based upon an orientation of a semiconducting substrate in the tool during processing operations, positioning at least one subsequently processed semiconducting substrate in the process tool at an orientation selected to minimize defective die produced by the process tool, the selected orientation being based upon the determined defective die pattern of the process tool, and performing processing operations in the process tool on at least one subsequently processed substrate while at least one substrate is positioned in the process tool at the selected orientation.

Abstract: A method and an apparatus are provided for parallel fault detection. The method comprises receiving data associated with processing of a workpiece by a first processing tool, receiving data associated with processing of a workpiece by a second processing tool and comparing at least a portion of the received data to a common fault model to determine if a fault associated with at least one of the processing of the workpiece by the first processing tool and processing of the workpiece by the second processing tool occurred.