Patents by Inventor Hsi-Tsung Lin

Hsi-Tsung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967613
    Abstract: A semiconductor structure includes a substrate, and an active device and a passive device over the substrate. The active device is disposed in a first region of the substrate, and the passive device is disposed in a second region of the substrate. The semiconductor structure further includes a shielding structure and a passivation layer. The shielding structure includes a barrier layer and a ceiling layer. The barrier layer is on the passive device and the active device, and the ceiling layer is on the barrier layer. The passivation layer is under the barrier layer and covers a top surface of the passive device. An air cavity is defined by sidewalls of the barrier layer, a bottom surface of the ceiling layer, and the substrate.
    Type: Grant
    Filed: May 16, 2023
    Date of Patent: April 23, 2024
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Ju-Hsien Lin, Jung-Tao Chung, Shu-Hsiao Tsai, Hsi-Tsung Lin, Chen-An Hsieh, Yi-Han Chen, Yao-Ting Shao
  • Patent number: 11939456
    Abstract: A composition for preparing a foam, a foam, and a shoe employing the foam are provided. The composition for preparing a foam includes 3-30 parts by weight of a first polymer and at least one of a second polymer and a third polymer. The first polymer is cyclic olefin polymer (COP), cyclic olefin copolymer (COC), metallocene based cyclic olefin copolymer (mCOC), fully hydrogenated conjugated diene-vinyl aromatic copolymer, or a combination thereof. The total weight of the second polymer and the third polymer is 70-97 parts by weight. The second polymer is polyolefin, olefin copolymer, or a combination thereof. The third polymer is conjugated diene-vinyl aromatic copolymer, partially hydrogenated conjugated diene-vinyl aromatic copolymer, or a combination thereof. The total weight of the first polymer and at least one of the second polymer and the third polymer is 100 parts by weight.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: March 26, 2024
    Assignee: TSRC CORPORATION
    Inventors: Hsi-Hsin Shih, Hsuan-Tsung Lin, Ying-Pin Tu, Han-Ming Tsai
  • Publication number: 20230317633
    Abstract: A semiconductor chip includes an active device and a passive device formed over a substrate. A passivation layer covers the active device and the passive device. A barrier structure surrounds the active device. A ceiling layer is formed across the barrier structure over the active device. The ceiling layer has an opening exposing the barrier structure.
    Type: Application
    Filed: March 30, 2022
    Publication date: October 5, 2023
    Inventors: Chang-Hwang HUA, Chun-Han SONG, Rong-Hao SYU, Hsi-Tsung LIN, Shu-Hsiao TSAI
  • Publication number: 20230282697
    Abstract: A semiconductor structure includes a substrate, and an active device and a passive device over the substrate. The active device is disposed in a first region of the substrate, and the passive device is disposed in a second region of the substrate. The semiconductor structure further includes a shielding structure and a passivation layer. The shielding structure includes a barrier layer and a ceiling layer. The barrier layer is on the passive device and the active device, and the ceiling layer is on the barrier layer. The passivation layer is under the barrier layer and covers a top surface of the passive device. An air cavity is defined by sidewalls of the barrier layer, a bottom surface of the ceiling layer, and the substrate.
    Type: Application
    Filed: May 16, 2023
    Publication date: September 7, 2023
    Inventors: Ju-Hsien LIN, Jung-Tao CHUNG, Shu-Hsiao TSAI, Hsi-Tsung LIN, Chen-An HSIEH, Yi-Han CHEN, Yao-Ting SHAO
  • Patent number: 11695037
    Abstract: A semiconductor structure includes a substrate, a passive device and an active device over the substrate. The active device is formed in the first region of the substrate, and the passive device is formed in the second region of the substrate. The semiconductor structure further includes a passivation layer that covers the top surface of the passive device. The passivation layer has an opening that exposes the active device.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: July 4, 2023
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Ju-Hsien Lin, Jung-Tao Chung, Shu-Hsiao Tsai, Hsi-Tsung Lin, Chen-An Hsieh, Yi-Han Chen, Yao-Ting Shao
  • Publication number: 20220223685
    Abstract: A semiconductor structure includes a substrate, a passive device and an active device over the substrate. The active device is formed in the first region of the substrate, and the passive device is formed in the second region of the substrate. The semiconductor structure further includes a passivation layer that covers the top surface of the passive device. The passivation layer has an opening that exposes the active device.
    Type: Application
    Filed: January 12, 2021
    Publication date: July 14, 2022
    Inventors: Ju-Hsien LIN, Jung-Tao CHUNG, Shu-Hsiao TSAI, Hsi-Tsung LIN, Chen-An HSIEH, Yi-Han CHEN, Yao-Ting SHAO
  • Patent number: 10643993
    Abstract: A compound semiconductor monolithically integrated circuit device with transistors and diodes comprises a compound semiconductor substrate, a transistor epitaxial structure, a transistor upper structure, a first diode, and a second diode. The transistor epitaxial structure forms on the compound semiconductor substrate. The first diode, the second diode, and the transistor upper structure form on a first part, a second part, and a third part of the transistor epitaxial structure, respectively. The transistor upper structure and the third part of the transistor epitaxial structure form a transistor. The first diode comprises a first part of an n-type doped epitaxial layer, a first part of a first intrinsic epitaxial layer, a first electrode, and a second electrode. The second diode comprises a second part of the n-type doped epitaxial layer, a second part of the first intrinsic epitaxial layer, a first electrode, and a second electrode.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: May 5, 2020
    Assignee: Win Semiconductors Corp.
    Inventors: Hsi-Tsung Lin, Yan-Cheng Lin, Sheng-Hsien Liu
  • Publication number: 20200013774
    Abstract: A compound semiconductor monolithically integrated circuit device with transistors and diodes comprises a compound semiconductor substrate, a transistor epitaxial structure, a transistor upper structure, a first diode, and a second diode. The transistor epitaxial structure forms on the compound semiconductor substrate. The first diode, the second diode, and the transistor upper structure form on a first part, a second part, and a third part of the transistor epitaxial structure, respectively. The transistor upper structure and the third part of the transistor epitaxial structure form a transistor. The first diode comprises a first part of an n-type doped epitaxial layer, a first part of a first intrinsic epitaxial layer, a first electrode, and a second electrode. The second diode comprises a second part of the n-type doped epitaxial layer, a second part of the first intrinsic epitaxial layer, a first electrode, and a second electrode.
    Type: Application
    Filed: March 4, 2019
    Publication date: January 9, 2020
    Inventors: Hsi-Tsung LIN, Yan-Cheng LIN, Sheng-Hsien LIU
  • Patent number: 10361272
    Abstract: An InGaAlP Schottky field effect transistor with AlGaAs carrier supply layer comprises a buffer layer, a channel layer, a carrier supply layer, a Schottky barrier layer and a cap layer sequentially formed on a compound semiconductor substrate; the cap layer has a gate recess, a bottom of the gate recess is defined by the Schottky barrier layer; a source electrode and a drain electrode are formed respectively on the cap layer at two sides with respect to the gate recess, the source electrode and the drain electrode form respectively an ohmic contact with the cap layer; a gate electrode is formed on the Schottky barrier layer within the gate recess, the gate electrode and the Schottky barrier layer form a Schottky contact; wherein the carrier supply layer is made of AlGaAs; the Schottky barrier layer is made of InGaAlP.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: July 23, 2019
    Assignee: Win Semiconductors Corp.
    Inventors: Shih-Ming Joseph Liu, Yu-Chi Wang, Cheng-Guan Yuan, Hsi-Tsung Lin, Chia Hsiung Lee
  • Publication number: 20190074356
    Abstract: An InGaAlP Schottky field effect transistor with AlGaAs carrier supply layer comprises a buffer layer, a channel layer, a carrier supply layer, a Schottky barrier layer and a cap layer sequentially formed on a compound semiconductor substrate; the cap layer has a gate recess, a bottom of the gate recess is defined by the Schottky barrier layer; a source electrode and a drain electrode are formed respectively on the cap layer at two sides with respect to the gate recess, the source electrode and the drain electrode form respectively an ohmic contact with the cap layer; a gate electrode is formed on the Schottky barrier layer within the gate recess, the gate electrode and the Schottky barrier layer form a Schottky contact; wherein the carrier supply layer is made of AlGaAs; the Schottky barrier layer is made of InGaAlP.
    Type: Application
    Filed: October 30, 2017
    Publication date: March 7, 2019
    Inventors: Shih-Ming Joseph LIU, Yu-Chi WANG, Cheng-Guan YUAN, Hsi-Tsung LIN, Chia Hsiung LEE
  • Patent number: 10186620
    Abstract: An InGaAlP Schottky field effect transistor with stepped bandgap ohmic contact, comprising: a buffer layer, a channel layer, a carrier supply layer, a Schottky barrier layer, an intermediate bandgap layer, a cap layer and an ohmic metal layer sequentially formed on a compound semiconductor substrate; wherein the Schottky barrier layer is made of InGaAlP; the ohmic metal layer and the cap layer form an ohmic contact. The Schottky barrier layer, the intermediate bandgap layer and the cap layer have a Schottky-barrier-layer bandgap, an intermediate bandgap and a cap-layer bandgap respectively, wherein the intermediate bandgap is less than the Schottky-barrier-layer bandgap and greater than the cap-layer bandgap.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: January 22, 2019
    Assignee: WIN SEMICONDUCTOR CORP.
    Inventors: Cheng-Guan Yuan, Shih-Ming Joseph Liu, Hsi-Tsung Lin, Chia Hsiung Lee