Patents by Inventor Hsiang-Chi Chen

Hsiang-Chi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11996165
    Abstract: A memory chip includes a first decoding device and a memory device. The first decoding device is configured to generate multiple word line signals. The memory device is configured to generate a third data signal based on a first data signal and a second data signal. The memory device includes a first memory circuit and a second memory circuit. The first memory circuit is configured to generate the first data signal at a first node according to the word line signals during a first period. The second memory circuit is configured to generate the second data signal at a second node different from the first node according to the word line signals during a second period after the first period. A method of operating a memory chip is also disclosed herein.
    Type: Grant
    Filed: May 17, 2022
    Date of Patent: May 28, 2024
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Hsiang-Chi Cheng, Shyh-Bin Kuo, Yi-Cheng Lai, Chung-Hung Chen, Shih-Hsien Yang, Yu-Chih Wang, Kuo-Hsiang Chen
  • Publication number: 20240159937
    Abstract: A photographing lens assembly includes at least four lens elements that are, in order from an object side to an image side along an optical path, a first lens element, a second lens element, at least one subsequent lens element and a last lens element that is closest to an image surface. Each of the at least four lens elements has an object-side surface facing toward the object side and an image-side surface facing toward the image side. At least one surface among lens surfaces from the image-side surface of the second lens element to the object-side surface of the last lens element is a metasurface having a subwavelength microstructure.
    Type: Application
    Filed: January 17, 2023
    Publication date: May 16, 2024
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Guan-Bo LIN, Hsiang-Chi TANG, Chun-Che HSUEH, I-Hsuan CHEN
  • Patent number: 11935787
    Abstract: A semiconductor device includes a first gate structure disposed on a substrate and extending in a first direction. The first gate structure includes a first gate electrode, a first cap insulating layer disposed over the first gate electrode, first sidewall spacers disposed on opposing side faces of the first gate electrode and the first cap insulating layer and second sidewall spacers disposed over the first sidewall spacers. The semiconductor device further includes a first protective layer formed over the first cap insulating layer, the first sidewall spacers and the second sidewall spacers. The first protective layer has a ?-shape having a head portion and two leg portions in a cross section along a second direction perpendicular to the first direction.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hui-Chi Chen, Hsiang-Ku Shen, Jeng-Ya Yeh
  • Patent number: 11923405
    Abstract: The present disclosure is directed to a semiconductor device. The semiconductor device includes a substrate, an insulating layer disposed on the substrate, a first conductive feature disposed in the insulating layer, and a capacitor structure disposed on the insulating layer. The capacitor structure includes a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, and a third electrode sequentially stacked. The semiconductor device also includes a first via connected to the first electrode and the third electrode, a second via connected to the second electrode, and a third via connected to the first conductive feature. A part of the first via is disposed in the insulating layer. A portion of the first conductive feature is directly under the capacitor structure.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chih-Fan Huang, Hung-Chao Kao, Yuan-Yang Hsiao, Tsung-Chieh Hsiao, Hsiang-Ku Shen, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
  • Patent number: 11264378
    Abstract: A device includes a dielectric layer, an interlayer metal pad in the dielectric layer, a first capacitor over the interlayer metal pad, and a second capacitor over the dielectric layer. The first capacitor includes a first bottom capacitor electrode over and in contact with the interlayer metal pad, a first top capacitor electrode, and a first inter-electrode dielectric layer between the first bottom capacitor electrode and the first top capacitor electrode. The second capacitor includes a second bottom capacitor electrode over and in contact with the dielectric layer, a second top capacitor electrode, and a second inter-electrode dielectric layer between the second bottom capacitor electrode and the second top capacitor electrode.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: March 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shao-Yu Chen, Chih-Ping Chao, Chun-Hung Chen, Chung-Long Chang, Kuan-Chi Tsai, Wei-Kung Tsai, Hsiang-Chi Chen, Ching-Chung Hsu, Cheng-Chang Hsu, Yi-Sin Wang
  • Publication number: 20200273823
    Abstract: A semiconductor device package includes a first substrate, a second substrate, an electrical contact and a support element. The first substrate has a first surface. The second substrate has a first surface facing the first surface of the first substrate. The electrical contact is disposed between the first substrate and the second substrate. The support element is disposed between the first substrate and the second substrate. The support element includes a thermosetting material.
    Type: Application
    Filed: February 27, 2019
    Publication date: August 27, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsiang Chi CHEN, Cheng-Nan LIN
  • Publication number: 20200126976
    Abstract: A device includes a dielectric layer, an interlayer metal pad in the dielectric layer, a first capacitor over the interlayer metal pad, and a second capacitor over the dielectric layer. The first capacitor includes a first bottom capacitor electrode over and in contact with the interlayer metal pad, a first top capacitor electrode, and a first inter-electrode dielectric layer between the first bottom capacitor electrode and the first top capacitor electrode. The second capacitor includes a second bottom capacitor electrode over and in contact with the dielectric layer, a second top capacitor electrode, and a second inter-electrode dielectric layer between the second bottom capacitor electrode and the second top capacitor electrode.
    Type: Application
    Filed: December 20, 2019
    Publication date: April 23, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shao-Yu CHEN, Chih-Ping CHAO, Chun-Hung CHEN, Chung-Long CHANG, Kuan-Chi TSAI, Wei-Kung TSAI, Hsiang-Chi CHEN, Ching-Chung HSU, Cheng-Chang HSU, Yi-Sin WANG
  • Patent number: 10515949
    Abstract: An integrated circuit includes a stacked MIM capacitor and a thin film resistor and methods of fabricating the same are disclosed. A capacitor bottom metal in one capacitor of the stacked MIM capacitor and the thin film resistor are substantially at the same layer of the integrated circuit, and the capacitor bottom metal and the thin film resistor are also made of substantially the same materials. The integrated circuit with both of a stacked MIM capacitor and a thin film resistor can be made in a cost benefit way accordingly, so as to overcome disadvantages mentioned above.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shao-Yu Chen, Chih-Ping Chao, Chun-Hung Chen, Chung-Long Chang, Kuan-Chi Tsai, Wei-Kung Tsai, Hsiang-Chi Chen, Ching-Chung Hsu, Cheng-Chang Hsu, Yi-Sin Wang
  • Publication number: 20150108607
    Abstract: An integrated circuit includes a stacked MIM capacitor and a thin film resistor and methods of fabricating the same are disclosed. A capacitor bottom metal in one capacitor of the stacked MIM capacitor and the thin film resistor are substantially at the same layer of the integrated circuit, and the capacitor bottom metal and the thin film resistor are also made of substantially the same materials. The integrated circuit with both of a stacked MIM capacitor and a thin film resistor can be made in a cost benefit way accordingly, so as to overcome disadvantages mentioned above.
    Type: Application
    Filed: October 17, 2013
    Publication date: April 23, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shao-Yu CHEN, Chih-Ping Chao, Chun-Hung Chen, Chung-Long Chang, Kuan-Chi Tsai, Wei-Kung Tsai, Hsiang-Chi Chen, Ching-Chung Hsu, Cheng-Chang Hsu, Yi-Sin Wang
  • Patent number: 8011065
    Abstract: A hinge is mounted between a cover and a base of an electronic device. A lid covers the hinge and is attached securely to the base. The hinge has an arced surface and a rotating shaft. When the cover is pivoted to a certain angle, the rotating shaft abuts the arced surface to lift up the cover so the cover is selectively distant away from the lid. Therefore, the shape of the electronic device does not need to be disfigured and the cover still does not bump against the lid.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: September 6, 2011
    Assignee: Shin Zu Shing Co., Ltd.
    Inventors: Hsiang-Chi Chen, Chia-Hsiang Chen, Weiming Chen
  • Patent number: 7752711
    Abstract: A hinge is mounted between a cover and a base of an electronic device. A lid covers the hinge and is attached securely to the base. The hinge has two tilting brackets, two tilting shafts, two linking assemblies and two actuating washers. Each tilting bracket has a mounting wing with an elongated hole and a mounting hole and a connecting wing with an abutting surface. The tilting shafts are mounted movably through the elongated holes. Each linking assembly has an actuating seat mounted around the tilting shaft, a holding seat formed on the actuating seat and protruding into the mounting hole and a resilient element mounted in the mounting hole and pressing against the holding seat. The actuating washers are mounted securely around the tilting shafts and selectively abut the abutting surfaces of the connecting wings to lift up the cover.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: July 13, 2010
    Assignee: Shin Zu Shing Co., Ltd.
    Inventors: Hsiang-Chi Chen, Chia-Hsiang Chen, Weiming Chen
  • Publication number: 20100154165
    Abstract: A hinge is mounted between a cover and a base of an electronic device. A lid covers the hinge and is attached securely to the base. The hinge has two tilting brackets, two tilting shafts, two linking assemblies and two actuating washers. Each tilting bracket has a mounting wing with an elongated hole and a mounting hole and a connecting wing with an abutting surface. The tilting shafts are mounted movably through the elongated holes. Each linking assembly has an actuating seat mounted around the tilting shaft, a holding seat formed on the actuating seat and protruding into the mounting hole and a resilient element mounted in the mounting hole and pressing against the holding seat. The actuating washers are mounted securely around the tilting shafts and selectively abut the abutting surfaces of the connecting wings to lift up the cover.
    Type: Application
    Filed: December 24, 2008
    Publication date: June 24, 2010
    Applicant: SHIN ZU SHING CO., LTD.
    Inventors: Hsiang-Chi CHEN, Chia-Hsiang CHEN, Weiming CHEN