Patents by Inventor Hsiang-Hung Chang

Hsiang-Hung Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978674
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first source/drain epitaxial feature formed over a substrate, a second source/drain epitaxial feature formed over the substrate, two or more semiconductor layers disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature, a gate electrode layer surrounding a portion of one of the two or more semiconductor layers, a first dielectric region disposed in the substrate and in contact with a first side of the first source/drain epitaxial feature, and a second dielectric region disposed in the substrate and in contact with a first side of the second source/drain epitaxial feature, the second dielectric region being separated from the first dielectric region by a substrate.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: I-Ming Chang, Jung-Hung Chang, Chung-Liang Cheng, Hsiang-Pi Chang, Yao-Sheng Huang, Huang-Lin Chao
  • Publication number: 20230411382
    Abstract: An electrostatic discharge (ESD) protection device including the following components is provided. A first transistor includes a first gate, a first N-type source region, and an N-type drain region. A second transistor includes a second gate, a second N-type source region, and the N-type drain region. The N-type drain region is located between the first gate and the second gate. An N-type drift region is located in a P-type substrate between the first gate and the second gate and is located directly below a portion of the first gate and directly below a portion of the second gate. The N-type drain region is located in the N-type drift region. A P-type barrier region is located in the P-type substrate below the N-type drift region. The P-type barrier region has an overlapping portion overlapping the N-type drift region. There is at least one first opening in the overlapping portion.
    Type: Application
    Filed: August 9, 2022
    Publication date: December 21, 2023
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Ming-Hui Chen, Chih-Feng Lin, Chiu-Tsung Huang, Hsiang-Hung Chang
  • Patent number: 11508772
    Abstract: An image sensor including a substrate and an image sensing element is provided. The substrate has an arc surface. The image sensing element is disposed on the arc surface and curved to fit a contour of the arc surface. The image sensing element has a front surface and a rear surface opposite to the front surface and has at least one bonding wire, the bonding wire is connected between the front surface and the substrate, and the rear surface of the image sensing element directly contacts the arc surface. In addition, a manufacturing method of the image sensor is also provided.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: November 22, 2022
    Assignee: Industrial Technology Research Institute
    Inventors: Chia-Wen Chiang, Hsiang-Hung Chang
  • Publication number: 20220301980
    Abstract: A through substrate via structure and a manufacturing method thereof, and a redistribution layer structure and a manufacturing method thereof are provided. The through substrate via structure includes a columnar conductive layer and a nanotwinned metal film disposed at least around the conductive layer. In a cross-section of the through substrate via structure, relative to a total area of the conductive layer and the nanotwinned metal film, an area ratio of the nanotwinned metal film is 50% or less by area.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 22, 2022
    Applicant: Industrial Technology Research Institute
    Inventors: Wei-Lan Chiu, Hsiang-Hung Chang
  • Publication number: 20210151491
    Abstract: An image sensor including a substrate and an image sensing element is provided. The substrate has an arc surface. The image sensing element is disposed on the arc surface and curved to fit a contour of the arc surface. The image sensing element has a front surface and a rear surface opposite to the front surface and has at least one bonding wire, the bonding wire is connected between the front surface and the substrate, and the rear surface of the image sensing element directly contacts the arc surface. In addition, a manufacturing method of the image sensor is also provided.
    Type: Application
    Filed: January 27, 2021
    Publication date: May 20, 2021
    Applicant: Industrial Technology Research Institute
    Inventors: Chia-Wen Chiang, Hsiang-Hung Chang
  • Patent number: 10943938
    Abstract: An image sensor including a substrate and an image sensing element is provided. The substrate has an arc surface. The image sensing element is disposed on the arc surface and curved to fit a contour of the arc surface. The image sensing element has a front surface and a rear surface opposite to each other and has at least one first conductive via. The rear surface of the image sensing element directly contacts the arc surface, and the first conductive via is extended from the front surface to the rear surface. In addition, a manufacturing method of the image sensor is also provided.
    Type: Grant
    Filed: December 25, 2018
    Date of Patent: March 9, 2021
    Assignee: Industrial Technology Research Institute
    Inventors: Chia-Wen Chiang, Hsiang-Hung Chang
  • Publication number: 20200185444
    Abstract: An image sensor including a substrate and an image sensing element is provided. The substrate has an arc surface. The image sensing element is disposed on the arc surface and curved to fit a contour of the arc surface. The image sensing element has a front surface and a rear surface opposite to each other and has at least one first conductive via. The rear surface of the image sensing element directly contacts the arc surface, and the first conductive via is extended from the front surface to the rear surface. In addition, a manufacturing method of the image sensor is also provided.
    Type: Application
    Filed: December 25, 2018
    Publication date: June 11, 2020
    Applicant: Industrial Technology Research Institute
    Inventors: Chia-Wen Chiang, Hsiang-Hung Chang
  • Patent number: 10520422
    Abstract: An optical micro-particle detector including a light source, a gas channel and a plurality of optical detectors is provided. The light source is configured to generate a light beam. The gas channel has at least one curved segment. The curved segment has a light entrance and a plurality of light exits. The light beam from the light source enters the gas channel through the light entrance. The plurality of optical detectors are optically coupled to the light exits, respectively.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: December 31, 2019
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Lan Chiu, Hsiang-Hung Chang
  • Patent number: 10458893
    Abstract: A miniaturized particulate matter detector that includes a filter and a concentration detector is provided. The filter has a plurality of holes, and the concentration detector is correspondingly disposed under the filter. The concentration detector has a detected area used to detect a concentration of at least one miniaturized particulate matter. A manufacturing method of the filter is also provided.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: October 29, 2019
    Assignee: Industrial Technology Research Institute
    Inventors: Chia-Wen Chiang, Cheng-Ta Ko, I-Hsing Lin, Hsiang-Hung Chang, Wen-Chih Chen
  • Patent number: 10361235
    Abstract: An image sensor including a substrate, an image sensing element, and an adhesive layer is provided. The substrate has an arc surface. The image sensing element is disposed on the arc surface and curved to fit the contour of the arc surface. The adhesive layer is disposed on the arc surface and encapsulates the image sensing element.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: July 23, 2019
    Assignee: Industrial Technology Research Institute
    Inventors: Sheng-Shu Yang, Hsiang-Hung Chang
  • Publication number: 20190072476
    Abstract: An optical micro-particle detector including a light source, a gas channel and a plurality of optical detectors is provided. The light source is configured to generate a light beam. The gas channel has at least one curved segment. The curved segment has a light entrance and a plurality of light exits. The light beam from the light source enters the gas channel through the light entrance. The plurality of optical detectors are optically coupled to the light exits, respectively.
    Type: Application
    Filed: December 15, 2017
    Publication date: March 7, 2019
    Applicant: Industrial Technology Research Institute
    Inventors: Wei-Lan Chiu, Hsiang-Hung Chang
  • Publication number: 20180145107
    Abstract: A manufacturing method of an image sensor. A substrate is provided, and the substrate has an arc surface. A cover, an adhesive layer, and an image sensing element are provided. The adhesive layer is bonded between the cover and the image sensing element. The cover, the adhesive layer, and the image sensing element bonded together are aligned to the substrate. The cover, the adhesive layer, and the image sensing element are pressed onto the substrate, such that the image sensing element is pressed by the adhesive layer and is thus curved to fit a contour of the arc surface, and the image sensing element is encapsulated by the adhesive layer.
    Type: Application
    Filed: October 20, 2017
    Publication date: May 24, 2018
    Applicant: Industrial Technology Research Institute
    Inventors: Sheng-Shu Yang, Hsiang-Hung Chang
  • Publication number: 20180145106
    Abstract: An image sensor including a substrate, an image sensing element, and an adhesive layer is provided. The substrate has an arc surface. The image sensing element is disposed on the arc surface and curved to fit the contour of the arc surface. The adhesive layer is disposed on the arc surface and encapsulates the image sensing element.
    Type: Application
    Filed: December 28, 2016
    Publication date: May 24, 2018
    Applicant: Industrial Technology Research Institute
    Inventors: Sheng-Shu Yang, Hsiang-Hung Chang
  • Publication number: 20170052103
    Abstract: A miniaturized particulate matter detector that includes a filter and a concentration detector is provided. The filter has a plurality of holes, and the concentration detector is correspondingly disposed under the filter. The concentration detector has a detected area used to detect a concentration of at least one miniaturized particulate matter. A manufacturing method of the filter is also provided.
    Type: Application
    Filed: August 24, 2016
    Publication date: February 23, 2017
    Applicant: Industrial Technology Research Institute
    Inventors: Chia-Wen Chiang, Cheng-Ta Ko, I-Hsing Lin, Hsiang-Hung Chang, Wen-Chih Chen
  • Publication number: 20160043239
    Abstract: Conductive plug structures suitable for stacked semiconductor device package is provided, wherein large contact region between the conductive plug structures and the corresponding pads of devices can be achieved, to reduce electrical impedance. Therefore, package structures such as photosensitive device packages using the conductive plug structures have superior electrical performance and reliability.
    Type: Application
    Filed: October 22, 2015
    Publication date: February 11, 2016
    Inventors: Hsiang-Hung Chang, Wen-Chih Chen, Chia-Wei Jui, Zhi-Cheng Hsiao, Cheng-Ta Ko, Rong-Shen Lee, Sheng-Shu Yang
  • Publication number: 20150097259
    Abstract: Conductive plug structures suitable for stacked semiconductor device package is provided, wherein large contact region between the conductive plug structures and the corresponding pads of devices can be achieved, to reduce electrical impedance. Therefore, package structures such as photosensitive device packages using the conductive plug structures have superior electrical performance and reliability.
    Type: Application
    Filed: December 15, 2014
    Publication date: April 9, 2015
    Applicant: Industrial Technology Research Institute
    Inventors: Hsiang-Hung CHANG, Wen-Chih CHEN, Chia-Wei JUI, Zhi-Cheng HSIAO, Cheng-Ta KO, Rong-Shen LEE, Sheng-Shu YANG
  • Patent number: 8193632
    Abstract: The three-dimensional conducting structure comprises a substrate, a first redistributed conductor, a second redistributed conductor and an insulator. The substrate has an active surface, a passive surface opposite to the active one, a pad on the active surface and a through hole. The first redistributed conductor comprises a projecting portion and a receiving portion. The projecting portion is projected from the active surface and electrically connected to the pad. The receiving portion is outside the active surface and in contact with the projecting portion, both of which constitute a recess communicating with the through hole. The second redistributed conductor is positioned within the through hole and the recess, in contact with the receiving portion, and extended toward the passive surface along the through hole. The insulator is filled between the second redistributed conductor and the substrate and between the second redistributed conductor and the projecting portion.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: June 5, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Hsiang-Hung Chang, Shu-Ming Chang, Tzu-Ying Kuo, Yuan-Chang Lee
  • Publication number: 20120133046
    Abstract: A semiconductor structure and a process thereof are provided. The semiconductor structure includes a semiconductor wafer having a first surface and a second surface opposite to the first surface, through silicon vias and a crack stopping slot. The through silicon vias are embedded in the semiconductor wafer and connected between the first surface and the second surface. The crack stopping slot is located in the periphery of the second surface of the semiconductor wafer. The depth of the crack stopping slot is less than or equal to the thickness of the semiconductor wafer. The process firstly provides a semiconductor wafer having through silicon vias. Then, the aforementioned crack stopping slot is formed at a back side of the semiconductor wafer opposite to the first surface. Next, the semiconductor wafer is thinned from the back side to expose a second end of each through silicon via.
    Type: Application
    Filed: March 1, 2011
    Publication date: May 31, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chun-Hsien Chien, John H. Lau, Hsiang-Hung Chang, Huan-Chun Fu, Tzu-Ying Kuo, Wen-Li Tsai
  • Patent number: 7902674
    Abstract: This invention provides a substrate having at least one bottom electrode formed therein. A plurality of dice each having at least one opening formed therein are vertically stacked together one by one by a polymer insulating layer acting as an adhering layer between them, along with the openings thereof aligned to each other to form a through hole passing through said dice. The stacked dice are joined to a bottom of the substrate with the polymer insulating layer acting as an adhering layer, making the bottom electrode of the substrate contact the through hole. An electroplating process is performed with the bottom electrode serving as an electroplating electrode to form a conductive contact passing through the dice.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: March 8, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Hsiang-Hung Chang, Shu-Ming Chang
  • Patent number: 7663231
    Abstract: This invention provides an image sensor module with a three-dimensional die-stacking structure. By filling a conductive material into through silicon vias within at least one image sensor die, and into via holes within an insulating layer, vertical electrical connections are formed between the image sensor die and an image processor buried in the insulating layer. A plurality of solder bumps is formed on a backside of the image sensor module so that the module can be directly assembled onto a circuit board. The image sensor module of this invention is characterized by a wafer-level packaging architecture and a three-dimensional die-stacking structure, which reduces electrical connection lengths within the module and thus reduces an area and height of the whole packaged module.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: February 16, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Shu-Ming Chang, Tzu-Ying Kuo, Chia-Wen Chiang, Hsiang-Hung Chang