Patents by Inventor Hsiao-Chin Chen

Hsiao-Chin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948938
    Abstract: In some embodiments, the present disclosure relates to a semiconductor device comprising a source and drain region arranged within a substrate. A conductive gate is disposed over a doped region of the substrate. A gate dielectric layer is disposed between the source region and the drain region and separates the conductive gate from the doped region. A bottommost surface of the gate dielectric layer is below a topmost surface of the substrate. First and second sidewall spacers are arranged along first and second sides of the conductive gate, respectively. An inner portion of the first sidewall spacer and an inner portion of the second sidewall spacer respectively cover a first and second top surface of the gate dielectric layer. A drain extension region and a source extension region respectively separate the drain region and the source region from the gate dielectric layer.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Huan Chen, Chien-Chih Chou, Ta-Wei Lin, Hsiao-Chin Tuan, Alexander Kalnitsky, Kong-Beng Thei, Shi-Chuang Hsiao, Yu-Hong Kuo
  • Patent number: 10396712
    Abstract: A transformer feed-back quadrature voltage controlled oscillator (QVCO) includes a first VCO; a second VCO; and a dynamic phase error correction circuit, having a plurality of coupling capacitors connected between the first and second VCOs, wherein the capacitances of the coupling capacitors are varied according to a digital control signal to correct a phase error of local oscillating (LO) signals of quadrature phases output by the first and second VCOs.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: August 27, 2019
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Hsiao-Chin Chen, Yen-Ting Chiang, Chien-Te Yu
  • Publication number: 20190165729
    Abstract: A transformer feed-back quadrature voltage controlled oscillator (QVCO) includes a first VCO; a second VCO; and a dynamic phase error correction circuit, having a plurality of coupling capacitors connected between the first and second VCOs, wherein the capacitances of the coupling capacitors are varied according to a digital control signal to correct a phase error of local oscillating (LO) signals of quadrature phases output by the first and second VCOs.
    Type: Application
    Filed: November 29, 2017
    Publication date: May 30, 2019
    Inventors: HSIAO-CHIN CHEN, YEN-TING CHIANG, CHIEN-TE YU
  • Patent number: 10097136
    Abstract: A transformer feed-back quadrature voltage controlled oscillator (QVCO) includes a first VCO; a second VCO; and a dynamic phase error correction circuit, having a plurality of coupling capacitors connected between the first and second VCOs, wherein the capacitances of the coupling capacitors are varied according to a digital control signal to correct a phase error of local oscillating (LO) signals of quadrature phases output by the first and second VCOs.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: October 9, 2018
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Hsiao-Chin Chen, Yen-Ting Chiang, Chien-Te Yu
  • Publication number: 20180175827
    Abstract: A low-pass filter with a super source follower is disclosed. The low-pass filter includes biquad cells. Each biquad cell includes the super source follower, a first capacitor, a second capacitor and a zero controlling capacitor. The super source follower includes a first MOSFET and a second MOSFET. A gate electrode of first MOSFET is coupled to an input voltage. A source electrode of first MOSFET is coupled to a node between the first capacitor and the second capacitor. A drain electrode of first MOSFET is coupled to a gate electrode of second MOSFET. The zero controlling capacitor is coupled between the gate electrode and source electrode of first MOSFET, and the zero controlling capacitor has a capacitance far larger than a parasitic capacitance between the gate electrode and the source electrode of first MOSFET to generate a pair of controllable transmission zeros under low-frequency operation.
    Type: Application
    Filed: December 15, 2017
    Publication date: June 21, 2018
    Inventors: Hsiao-Chin CHEN, Chi-Yin CHUNG
  • Publication number: 20120101848
    Abstract: A personal case history processing system writes health relevant data generated by a medical equipment into a data chip or supplies the health relevant data in the data chip to the medical equipment through a data reading/writing device or directly to the medical equipment by performing transmission of the health relevant data between the data chip and the corresponding data reading/writing device and/or the medical equipment, wherein the data chip may be connected to an IC card or a portable data processing device. Accordingly, personal transmission, reading/writing and access of the health relevant data may be realized.
    Type: Application
    Filed: October 21, 2011
    Publication date: April 26, 2012
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Shey-Shi Lu, Hsiao-Chin Chen, Yu-Lun Chang, Chen Tsou, Bi-Ru Wu, Yao-Hung Wang, Hung-Wei Chiu, Beender Yang
  • Patent number: 7672658
    Abstract: A frequency-converting circuit and a down converter with the frequency-converting circuit are disclosed. The above-mentioned frequency-converting circuit is used for converting an RF signal into a first baseband signal according to a poly-phase LO signal. The frequency-converting circuit includes a coupler, a first transduction unit and a first switching unit. The coupler is for receiving and splitting the RF signal and delivering a first RF signal via the first output terminal thereof. The first transduction unit is for amplifying the first RF signal. The first switching unit is for performing switching operations on the output signal of the first transduction unit and producing the first baseband signal.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: March 2, 2010
    Assignees: United Microelectronics Corp., National Taiwan University
    Inventors: Jen-Chung Chang, Chia-Jung Hsu, Shey-Shi Lu, Hsiao-Chin Chen, Yu-Yee Liow
  • Patent number: 7577418
    Abstract: A sub-harmonic mixer and a down converter with the sub-harmonic mixer are provided. The sub-harmonic mixer includes a differential amplifying unit, a current buffer unit, and a switching unit. The differential amplifying unit is used to amplify a radio frequency (RF) signal and employs a first resonance circuit to force a leakage signal to flow to a first voltage. The current buffer unit is used to amplify the gain of an output signal of the differential amplifying unit and employs a second resonance circuit to force the leakage signal to flow to a second voltage. Finally, the switching unit switches an output signal of the current buffer unit into a base band signal.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: August 18, 2009
    Assignees: United Microelectronics Corp., National Taiwan University
    Inventors: Jen-Chung Chang, Chia-Jung Hsu, Shey-Shi Lu, Hsiao-Chin Chen, Tzu-Chao Lin
  • Publication number: 20080185679
    Abstract: An inductor layout and manufacturing method thereof are provided. The inductor layout includes a substrate and a conductive path. The substrate includes at least an active region, wherein the active region includes at least a circuit. The conductive path is disposed over the substrate and arranged near the edge of the active region along the direction of the edge of the active region. Wherein, two ends of the conductive path are the two ends of the inductor.
    Type: Application
    Filed: October 19, 2006
    Publication date: August 7, 2008
    Applicants: UNITED MICROELECTRONICS CORP., NATIONAL TAIWAN UNIVERSITY
    Inventors: Tsun-Lai Hsu, Hsiao-Chin Chen, Shey-Shi Lu, Jen-Chung Chang, Chia-Jung Hsu
  • Publication number: 20080032659
    Abstract: A sub-harmonic mixer and a down converter with the sub-harmonic mixer are provided. The sub-harmonic mixer includes a differential amplifying unit, a current buffer unit, and a switching unit. The differential amplifying unit is used to amplify a radio frequency (RF) signal and employs a first resonance circuit to force a leakage signal to flow to a first voltage. The current buffer unit is used to amplify the gain of an output signal of the differential amplifying unit and employs a second resonance circuit to force the leakage signal to flow to a second voltage. Finally, the switching unit switches an output signal of the current buffer unit into a base band signal.
    Type: Application
    Filed: July 18, 2006
    Publication date: February 7, 2008
    Applicants: UNITED MICROELECTRONICS CORP., NATIONAL TAIWAN UNIVERSITY
    Inventors: Jen-Chung Chang, Chia-Jung Hsu, Shey-Shi Lu, Hsiao-Chin Chen, Tzu-Chao Lin
  • Publication number: 20080009259
    Abstract: A frequency-converting circuit and a down converter with the frequency-converting circuit are disclosed. The above-mentioned frequency-converting circuit is used for converting an RF signal into a first baseband signal according to a poly-phase LO signal. The frequency-converting circuit includes a coupler, a first transduction unit and a first switching unit. The coupler is for receiving and splitting the RF signal and delivering a first RF signal via the first output terminal thereof. The first transduction unit is for amplifying the first RF signal. The first switching unit is for performing switching operations on the output signal of the first transduction unit and producing the first baseband signal.
    Type: Application
    Filed: July 10, 2006
    Publication date: January 10, 2008
    Inventors: Jen-Chung Chang, Chia-Jung Hsu, Shey-Shi Lu, Hsiao-Chin Chen, Yu-Yee Liow
  • Publication number: 20050195541
    Abstract: A first inductor or resistor has a first terminal connected to a first node and a second terminal connected to a supply node or AC ground node. The first node is a first point of connection between a first circuit and a second circuit. A first varactor has a first terminal connected to the first node and a second terminal connected to a control signal. An optional control signal generator generates the control signal according to the C-V curve of the first varactor in order to adjust the capacitance of the first varactor, optimize the energy transfer between the first circuit and the second circuit and also can match the output impedance of the first circuit to the input impedance of the second circuit.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 8, 2005
    Inventors: Hsiao-Chin Chen, Chien-Kuang Lee