Patents by Inventor Hsiao-Li Wang

Hsiao-Li Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method to reduce lot-to-lot variation of array threshold voltage in a DRAM device
    Patent number: 6633793
    Abstract: A new method to reduce variation in an output parameter by selection of an optimal process recipe in the manufacture of an integrated circuit device is achieved. The method may be used to reduce the array voltage threshold in a DRAM circuit by compensating the source/drain ion implantation by calculating a predicted array voltage threshold. The integrated circuit device wafer is measured to obtain a present set of process parameter values. A predicted value of an output parameter is calculated by evaluating a first equation at the present set of process parameter values. The first equation is derived from a plurality of previous sets of process parameter values and the corresponding plurality of sets of output parameter values. The difference between the predicted value of the output parameter and a target value of the output parameter is the output parameter delta. A process recipe offset is calculated by evaluating a second equation at the output parameter delta.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: October 14, 2003
    Assignee: ProMos Technologies
    Inventors: Joseph Wu, Hsiao-Li Wang
  • Method to reduce lot-to-lot variation of array threshold voltage in a DRAM device
    Publication number: 20030033043
    Abstract: A new method to reduce variation in an output parameter by selection of an optimal process recipe in the manufacture of an integrated circuit device is achieved. The method may be used to reduce the array voltage threshold in a DRAM circuit by compensating the source/drain ion implantation by calculating a predicted array voltage threshold. The integrated circuit device wafer is measured to obtain a present set of process parameter values. A predicted value of an output parameter is calculated by evaluating a first equation at the present set of process parameter values. The first equation is derived from a plurality of previous sets of process parameter values and the corresponding plurality of sets of output parameter values. The difference between the predicted value of the output parameter and a target value of the output parameter is the output parameter delta. A process recipe offset is calculated by evaluating a second equation at the output parameter delta.
    Type: Application
    Filed: August 13, 2001
    Publication date: February 13, 2003
    Applicant: ProMOS Technologies
    Inventors: Joseph Wu, Hsiao-Li Wang