Abstract: A semiconductor package device is provided. The semiconductor package device includes a chip and a redistribution layer disposed on the chip and electrically connected to the chip. The redistribution layer includes a plurality of first metal lines and a plurality of second metal lines, wherein at least one of the second metal lines is disposed between two adjacent first metal lines. The included angle between the at least one of the second metal lines and the two adjacent first metal lines is greater than or equal to 0 degrees and less than or equal to 10 degrees. The first width of one of the two adjacent first metal lines is greater than the second width of the at least one of the second metal lines.

Abstract: A lighting device includes a driver, a first light string, a second light string, a constant current controller and a pulse width modulation controller. The driver is configured to provide a DC driving current to a shunt node. The first light string is electrically coupled between the shunt node and a ground terminal, and the first light string is driven by a first pulsating direct current. The second light string and the constant current controller are electrically coupled in series between the shunt node and the ground terminal. The pulse width modulation controller is configured to provide a pulse signal to the constant current controller, and the constant current controller controls a pulse frequency of a second pulsating direct current supplied for the second light string according to the pulse signal.

Abstract: A semiconductor device includes a first set of nanostructures stacked over a substrate in a vertical direction, and each of the first set of nanostructures includes a first end portion and a second end portion, and a first middle portion laterally between the first end portion and the second end portion. The first end portion and the second end portion are thicker than the first middle portion. The semiconductor device also includes a first plurality of semiconductor capping layers around the first middle portions of the first set of nanostructures, and a gate structure around the first plurality of semiconductor capping layers.

Abstract: A sensing circuit coupled to a sensor includes a first transistor, a second transistor, a third transistor, a fourth transistor, and an oscillator. The first transistor, coupled to a first current source and the sensor, receives a sensing current from the sensor. A gate terminal of the first transistor is connected to a source terminal of the first transistor. The second transistor, coupled to the first transistor and a second current source, generates a first current according to the sensing current. The first current is greater than the sensing current. The third transistor, coupled to the second transistor and the second current source, generates a second current according to the first current. The fourth transistor, coupled to the third transistor, generates a third current. The oscillator is coupled to the fourth transistor. The oscillator generates a signal having an oscillation frequency according to the third current.

Abstract: An electronic package and a method thereof are provided, in which an electronic component, conductive structures and conductive components are disposed on one side of a carrier and electrically connected to the carrier. The electronic component, the conductive structures and the conductive components are encapsulated by an encapsulation layer. A shielding layer is formed on the encapsulation layer to cover the electronic component, where the shielding layer is electrically connected to the conductive structures and free from being electrically connected to the conductive components. A shielding structure is formed to cover the other side of the carrier.

Abstract: A body structure of a portable computer including a case, a keyboard module, a touch pad module, and a cover. The case has an inner surface and an exterior surface opposite to each other, and the exterior surface is exposed to an outer environment. The case further has a first receiving opening, a second receiving opening, and a rib structure separating the first and the second receiving openings. The keyboard module is assembled to the second receiving opening from the exterior surface and locked at the rib structure. The touch pad module is assembled to the first receiving opening from the exterior surface and locked at the rib structure. The cover is assembled to the case and covers the rib structure.

Abstract: An e-paper identification card system including an e-paper identification card and a data updating apparatus is provided. The e-paper identification card is configured to display first image information. The data updating apparatus is electrically connected to the e-paper identification card. The data updating apparatus is configured to update the e-paper identification card according to the first image information to drive the e-paper identification card to display second image information. In addition, an e-paper identification card is also provided.

Abstract: An operation method for a memory device is provided. The memory device includes a two-terminal selector and a resistance variable storage element coupled to the two-terminal selector. The method includes providing a voltage pulse to the memory device. A voltage applied across the two-terminal selector during a falling part of the voltage pulse falls below a holding voltage of the two-terminal selector. A voltage falling rate of the falling part at which the voltage applied across the two-terminal selector reaches the holding voltage is raised for reducing threshold voltage drift of the two-terminal selector.

Abstract: A control method is disclosed to prevent false triggering of over-current protection. A power converter comprises high-side and low-side switches connected in series between an input power line and a ground line, for driving a resonant circuit to resonate. The power converter includes a detector detecting the resonant circuit to provide a detection signal representing a magnitude of resonance in the resonant circuit. A duty cycle of one of the high-side and low-side switches is detected, and a threshold is determined in response to the duty cycle. An over-current protection is triggered based on the threshold and the detection signal. When the over-current protection is triggered, at least one of the high-side and low-side switches stops providing power to the resonant circuit, and the resonance subsides.

Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.

Abstract: A deflecting plate includes a silicon-on-insulator (SOI) substrate. The SOI substrate includes: an insulator layer having a top surface and a bottom surface; a device layer coupled to the insulator layer at the top surface, wherein multiple deflecting apertures are disposed in the device layer, each of which extending from a top open end to a bottom open end through the device layer, and wherein the bottom open end is coplanar with the top surface of the insulator layer; and a handle substrate coupled to the insulator layer at the bottom surface, wherein a cavity is disposed in the handle substrate and extends from a cavity open end to a cavity bottom wall, and wherein the bottom wall is coplanar with the top surface of the insulator layer, such that the bottom open end of each deflecting aperture is exposed to the cavity.

Abstract: The present disclosure provides a semiconductor structure with having a source/drain feature with a central cavity, and a source/drain contact feature formed in central cavity of the source/drain region, wherein the source/drain contact feature is nearly wrapped around by the source/drain region. The source/drain contact feature may extend to a lower most of a plurality semiconductor layers.

Abstract: A power control system of a rack heat-dissipation system, which receives output voltages of a rack power supply and a module power supply, includes a first control module and a second control module operating in parallel. The first control module includes a first switching unit, a first voltage converting unit and a first monitoring unit. The second control module includes a second switching unit, a second voltage converting unit and a second monitoring unit. The first monitoring unit is connected to the rack power supply, the module power supply, the first switching unit and the first voltage converting unit, and the second monitoring unit is connected to the rack power supply, the module power supply, the second switching unit and the second voltage converting unit. The heat dissipation system can be kept in the normal operation even if one of the control modules is failed.

Abstract: A layout includes a first and a second standard cells abutting along a boundary line. The first cell includes first fins. An edge of the first fins closest to and away from the boundary line by a distance D1. A first gate line over-crossing the first fins protrudes from the edge by a length L1. The second cell includes second fins. An edge of the second fins closest to and away from the boundary line by a distance D2. A second gate line over-crossing the second fins protrudes from the edge by a length L2. Two first dummy gate lines at two sides of the first fins and two second dummy lines at two sides of the second fins are respectively away from the boundary line by a distance S. The lengths L1 and L2, the distances S, D1 and D2 have the relationships: L1?D1?S, L2?D2?S, and D1?D2.

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.

Abstract: Provided are pamoate salts of ketamine having a stoichiometry of 2:1 of ketamine to pamoate, including R, S-ketamine pamoate, S-ketamine pamoate, or R-ketamine pamoate, and crystalline or amorphous forms of the pamoate salts, and having excellent safety and properties for pharmaceutical applications. Also provided are pharmaceutical compositions including the pamoate salts of ketamine and their uses in treating a CNS disease or serving as an anesthetic.

Abstract: A structure and a method of forming are provided. The structure includes a first dielectric layer overlying a first substrate. A first connection pad is disposed in a top surface of the first dielectric layer and contacts a first redistribution line. A first dummy pad is disposed in the top surface of the first dielectric layer, the first dummy pad contacting the first redistribution line. A second dielectric layer overlies a second substrate. A second connection pad and a second dummy pad are disposed in the top surface of the second dielectric layer, the second connection pad bonded to the first connection pad, and the first dummy pad positioned in a manner that is offset from the second dummy pad so that the first dummy pad and the second dummy pad do not contact each other.

Abstract: There is provided a recognition system adaptable to a portable device or a wearable device. The recognition system senses a body heat using a thermal sensor, and performs functions such as the living body recognition, image denoising and body temperature prompting according to detected results.

Abstract: A radome for protecting a radar device is disposed in the transmission path of signals to/from the radar device. The radome includes a shell; a first circuit board disposed at a side of the shell facing a radar device to be protected, and configured with a first inner circuit ring and a first outer circuit ring facing toward the shell; a second circuit board disposed between the first circuit board and the shell, and configured with a second inner circuit ring and a second outer circuit ring facing toward the shell; a first insulation layer disposed between the first circuit board and the second circuit board; and a second insulation layer disposed between the second circuit board and the shell. The first and second inner circuit rings are enclosed with and insulated from the first and second outer rings, respectively, and each of the circuit rings forms a closed loop.

Abstract: Provided are a package structure having stacked semiconductor dies with wavy sidewalls and a method of forming the same. The package structure includes: a first die and a second die bonded together; a first encapsulant laterally encapsulating the first die; and a second encapsulant laterally encapsulating the second die, wherein a second interface of the second die in contact with the second encapsulant is a wavy interface in a cross-sectional plane.