Abstract: A method for multimedia image processing includes steps of identifying objects and selecting images, and is characterized in that when a body position of a preset object is detected and conformed to match a preset posture; or a plurality of the preset objects are detected to have body movements and facial expressions that are emotional, and the preset objects have at least one of looking in similar directions, one looking at the other, and at least two looking at each other, an interception time point is selected for selecting a candidate image, and the candidate image can be collected to produce a concatenated video with rich contents. An electronic device is also introduced for multimedia image processing, a terminal device connected thereto, and a non-transitory computer-readable recording medium.

Abstract: Embodiments include a Schottky barrier diode (SBD) structure and method of forming the same, the SBD structure including a current blockage feature to inhibit current from leaking at an interface with a shallow trench isolation regions surrounding an anode region of the SBD structure.

Abstract: An optical system is provided, including a first module configured to hold a first optical member. The first module includes a first movable portion, a first fixed portion, and a first driving assembly. The first movable portion is configured to connect the first optical member, and is movable relative to the fixed portion. The first driving assembly is configured to drive the first movable portion to move relative to the fixed portion.

Abstract: A carrier for solid state devices includes a plurality of panels, at least one gate, and an addition. The plurality of panels includes a first panel, a second panel, and a third panel. The at least one gate is attached to the second panel and the third panel. The at least one gate is configured to be in one of a first position or a second position. When the at least one gate is in the first position, an opening for receiving solid state devices is at least partially occluded to a first width that is smaller than a length of one of the solid state devices. When the at least one gate is in the second position, the opening for receiving the solid state devices is increased to a second width that is larger than the length of the one of the solid state devices.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A filling and covering machine for centrifuge tubes with tethered caps includes a conveying device, a cap-flapping device, a filling device, and a cap-pressing device. The cap-flapping device has an upper planar surface and a cap-guiding member having a starting end portion, an ending end portion that is opposite to the starting end portion, and a guiding surface extending from the starting end portion to the ending end portion, and cooperates with the upper planar surface to define an included angle therebetween decreasing gradually from the starting end portion to the ending end portion to guide a cap of each of the centrifuge tubes with tethered caps toward a tube body thereof.

Abstract: An optical system that includes a first module is provided. The first module includes a first movable portion, a first fixed portion, and a first driving assembly. The first movable portion is configured to connect the first optical member, and is movable relative to the first fixed portion. The first driving assembly is configured to drive the first movable portion to move relative to the first fixed portion.

Abstract: A dongle coupled between a power supplying device for supplying power and a power receiving device for receiving power includes a downstream facing port (DFP), an upstream facing port (UFP) and a controller. The controller is arranged to control deliveries of the power and messages between the power supplying device and the power receiving device. In response to a first power request message received from the power receiving device, the controller is arranged to determine whether a power type request by the power receiving device is Programmable Power Supply (PPS) according to the first power request message. When determining that the power type request by the power receiving device is PPS, the controller is arranged to start first waiting timer, and when the first waiting timer expires, the controller is arranged to send a request accept message to the power receiving device through the UFP.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes depositing a germanium layer over a silicon substrate; forming an oxide capping layer over the germanium layer; after forming the oxide capping layer, annealing the germanium layer to diffuse germanium atoms of the germanium layer into the silicon substrate, such that a portion of the silicon substrate is turned into a silicon germanium layer; and forming a gate structure over the silicon germanium layer.

Abstract: A subpixel structure includes a substrate and a light emitting diode chip. The light emitting diode chip is disposed on the substrate. The light emitting diode chip has a chip area and a light emitting area, and the light emitting area is less than or equal to one tenth of the chip area.

Abstract: A semiconductor device includes a first set of nanostructures stacked over a substrate in a vertical direction, and each of the first set of nanostructures includes a first end portion and a second end portion, and a first middle portion laterally between the first end portion and the second end portion. The first end portion and the second end portion are thicker than the first middle portion. The semiconductor device also includes a first plurality of semiconductor capping layers around the first middle portions of the first set of nanostructures, and a gate structure around the first plurality of semiconductor capping layers.

Abstract: A bracket module and a computing device including the bracket module are disclosed. The bracket module includes a housing structure. The housing structure includes a plurality of slots. Each slot is configured to accept a device inserted therein. The housing structure is configured for attachment in a chassis of the computing device. The bracket module further includes a tray structure. The tray structure includes a fixed end connected to the housing structure and a free end opposite from the fixed end. The tray structure is configured to rotate relative to the housing structure about the fixed end. The bracket module further includes at least one fastener configured to engage the tray structure with the housing structure in an open position.

Abstract: A semiconductor device package and a method of manufacturing a semiconductor device package are provided. The semiconductor device package includes at least one electronic component, a heat source, and a heat dissipation element. The heat source is adjacent to the electronic component. The heat dissipation element is disposed adjacent to the heat source and the electronic component. The heat dissipation element includes a heat transmitting structure configured to reduce heat, which is from the heat source, through the heat dissipation element, and transmitting in a direction toward the electronic component.

Abstract: An operation method for a memory device is provided. The memory device includes a two-terminal selector and a resistance variable storage element coupled to the two-terminal selector. The method includes providing a voltage pulse to the memory device. A voltage applied across the two-terminal selector during a falling part of the voltage pulse falls below a holding voltage of the two-terminal selector. A voltage falling rate of the falling part at which the voltage applied across the two-terminal selector reaches the holding voltage is raised for reducing threshold voltage drift of the two-terminal selector.

Abstract: The present disclosure provides a semiconductor structure with having a source/drain feature with a central cavity, and a source/drain contact feature formed in central cavity of the source/drain region, wherein the source/drain contact feature is nearly wrapped around by the source/drain region. The source/drain contact feature may extend to a lower most of a plurality semiconductor layers.

Abstract: A structure and a method of forming are provided. The structure includes a first dielectric layer overlying a first substrate. A first connection pad is disposed in a top surface of the first dielectric layer and contacts a first redistribution line. A first dummy pad is disposed in the top surface of the first dielectric layer, the first dummy pad contacting the first redistribution line. A second dielectric layer overlies a second substrate. A second connection pad and a second dummy pad are disposed in the top surface of the second dielectric layer, the second connection pad bonded to the first connection pad, and the first dummy pad positioned in a manner that is offset from the second dummy pad so that the first dummy pad and the second dummy pad do not contact each other.

Abstract: A layout includes a first and a second standard cells abutting along a boundary line. The first cell includes first fins. An edge of the first fins closest to and away from the boundary line by a distance D1. A first gate line over-crossing the first fins protrudes from the edge by a length L1. The second cell includes second fins. An edge of the second fins closest to and away from the boundary line by a distance D2. A second gate line over-crossing the second fins protrudes from the edge by a length L2. Two first dummy gate lines at two sides of the first fins and two second dummy lines at two sides of the second fins are respectively away from the boundary line by a distance S. The lengths L1 and L2, the distances S, D1 and D2 have the relationships: L1?D1?S, L2?D2?S, and D1?D2.

Abstract: An optical member driving mechanism is provided. The optical member driving mechanism includes a fixed portion, a movable portion, an electromagnetic driving assembly and an elastic member. The fixed portion has a base and a frame that is disposed on the base. The movable portion is movable relative to the fixed portion, and includes a carrier for carrying an optical member with an incident optical axis. The carrier includes a body and a sidewall that extends along the edge of the body, wherein the carrier further includes a first stopping portion and a second stopping portion protruding towards the fixed portion. The electromagnetic driving assembly drives the movable portion to move relative to the fixed portion. The movable portion is movably connected to the fixed portion via the elastic member.

Abstract: A carrier for different form factors for insertion in a slot of a computing device is disclosed. The different form factors have different thicknesses defined by the E1.S specification. The carrier includes a base holding a first type of form factor. A bezel is configurable for insertion in a slot for a device of the first type of form factor. The bezel has an attachment surface. The base is attachable to the attachment surface of the bezel. A second type of form factor is also attachable to the attachment surface of the bezel. A cover encloses the first type of form factor when joined to the base. The base and cover are discarded when the second type of form factor is attached to the bezel. The attached bezel and second type of form factor may also be inserted in the slot.

Abstract: A semiconductor device includes a semiconductor substrate, an isolation structure, a gate structure, and a source/drain feature. The semiconductor substrate includes a semiconductor fin, wherein the semiconductor fin comprises a silicon germanium portion. The isolation structure is at a sidewall of a bottom portion of the silicon germanium portion. A top portion of the silicon germanium portion is higher than a top surface of the isolation structure, and an atomic concentration of germanium in the top portion of the silicon germanium portion is greater than an atomic concentration of germanium in the bottom portion of the silicon germanium portion. The gate structure is over a first portion of the silicon germanium portion of the semiconductor fin. The source/drain feature is over a second portion of the silicon germanium portion of the semiconductor fin.