Abstract: A lighting keyboard includes a backlight module and at least one keyswitch. The backlight module includes a lighting substrate and a protruding structure. The lighting substrate includes two non-intersecting traces and a light emitting unit. The light emitting unit is connected between the two non-intersecting traces. A position of the protruding structure corresponds to a position of the light emitting unit and the protruding structure is located between the two non-intersecting traces. The at least one keyswitch is disposed on the backlight module.

Abstract: A layer stack including a first bonding dielectric material layer, a dielectric metal oxide layer, and a second bonding dielectric material layer is formed over a top surface of a substrate including a substrate semiconductor layer. A conductive material layer is formed by depositing a conductive material over the second bonding dielectric material layer. The substrate semiconductor layer is thinned by removing portions of the substrate semiconductor layer that are distal from the layer stack, whereby a remaining portion of the substrate semiconductor layer includes a top semiconductor layer. A semiconductor device may be formed on the top semiconductor layer.

Abstract: A hard disk bracket configured to be installed on a case includes a tray, a base, a handle, a pin, and a latch. The tray has an accommodating space. The base is connected to the tray. The handle is disposed in the base and has a first slide part detachably fastened with the base. The pin is disposed through the handle and the base. The latch is disposed in the base and is detachably fastened with the case. The latch is fastened with the handle and has a second slide part penetrating the handle for extending outside the base.

Abstract: A semiconductor structure includes a substrate, a conductive via and a first insulation layer. The conductive via is through the substrate. The first insulation layer is between the substrate and the conductive via. A first surface of the first insulation layer facing the substrate and a second surface of the first insulation layer facing the conductive via are extended along different directions.

Abstract: A device includes a bottom transistor, a top transistor, and an epitaxial isolation structure. The bottom transistor includes a first channel layer, first source/drain epitaxial structures, and a first gate structure. The first source/drain epitaxial structures are on opposite sides of the first channel layer. The first gate structure is around the first channel layer. The top transistor is over the bottom transistor and includes a second channel layer, second source/drain epitaxial structures, and a second gate structure. The second source/drain epitaxial structures are on opposite sides of the second channel layer. The second gate structure is around the second channel layer. The epitaxial isolation structure is between and in contact with one of the first source/drain epitaxial structures and one of the second source/drain epitaxial structures, such that the one of the first source/drain epitaxial structures is electrically isolated from the one of the second source/drain epitaxial structures.

Abstract: An electronic device includes a back board, a circuit board, a first attaching member and a second attaching member. The circuit board is arranged on the back board. The first attaching member is arranged between the back board and the circuit board. The second attaching member is arranged between the back board and the circuit board. The circuit board is fixed on the back board through the first attaching member and the second attaching member, and a material of the first attaching member is different from that of the second attaching member.

Abstract: A digital to analog converter for fiber optic gyroscope is disclosed. The digital to analog converter for fiber optic gyroscope includes a random unit generating a random number signal, a plurality of encoding units coupled with the random unit, a plurality of control units respectively one to one coupled with the plurality of encoding units, a current source array coupled with the plurality of control units, and an output load electrically connected to the current source array. Each of the plurality of encoding units converts a plurality of digital signals to a plurality of spin signals according to the random number signal. Each of the plurality of control units converts the plurality of spin signals to a plurality of logic signals. The current source array generates a total current according to the plurality of logic signals. The total current passes through the output load and forms an analog signal.

Abstract: A liquid crystal compound and a composition employing the same are provided. The liquid crystal compound has a structure represented by Formula (I) wherein R1, A1, A2, A3, A4, Z1, Z2, Z3, Z4, X, m, n, o, and p are defined as in the description.

Abstract: Liquid-crystal compounds, liquid-crystal compositions, and liquid-crystal devices employing the same are provided. The liquid-crystal compound has a structure of Formula (I): wherein R1 is hydrogen, C1-10 alkyl, or C2-10 alkenyl; R2 is, C2-10 alkenyl, or C2-10 fluoroalkenyl, in which one or two nonadjacent —CH2— is replaced by —O—, or C2-10 ether; A1, A2, A3, and A4 are independently R3 is independently hydrogen, or halogen; Z1, Z2, and Z3 are independently single bond, —CH2—, —(CH2)2—, —(CH2)4—, —CH2O—, —OCH2—, —CF?CF—, —(CH2)2CF2O—, —(CH2)2OCF2—, —OCF2(CH2)2—, —CF2O(CH2)2—, —COO—, —OCO—, —CF2O—, —OCF2—, —C?C—, —CH?CH—, —CH?CH—(CH2)2—, or —(CH2)2—CH?CH—; and n and m are independently 1 or 0.

Abstract: A liquid crystal compound and a composition employing the same are provided. The liquid crystal compound has a structure represented by Formula (I) wherein R1, A1, A2, A3, A4, Z1, Z2, Z3, Z4, X, m, n, o, and p are defined as in the description.

Abstract: Liquid-crystal compounds, liquid-crystal compositions, and liquid-crystal devices employing the same are provided. The liquid-crystal compound has a structure of Formula (I): wherein R1 is hydrogen, C1-10 alkyl, or C2-10 alkenyl; R2 is, C2-10 alkenyl, or C2-10 fluoroalkenyl, in which one or two nonadjacent —CH2— is replaced by —O—, or C2-10 ether; A1, A2, A3, and A4 are independently R3 is independently hydrogen, or halogen; Z1, Z2, and Z3 are independently single bond, —CH2—, —(CH2)2—, —(CH2)4—, —CH2O—, —OCH2—, —CF?CF—, —(CH2)2CF2O—, —(CH2)2OCF2—, —OCF2(CH2)2—, —CF2O(CH2)2—, —COO—, —OCO—, —CF2O—, —OCF2—, —C?C—, —CH?CH—, —CH?CH—(CH2)2—, or —(CH2)2—CH?CH—; and n and m are independently 1 or 0.

Abstract: A gas conduit for a load lock chamber. The gas conduit connects to a gas source to introduce gas from the gas source into the load lock chamber of semiconductor equipment. The structure includes a filter mounted on the top surface of the load lock chamber, a pressure limitative device to maintain a preset pressure of gas source, and a gas inlet device including an inlet end connected to the pressure limitative device and an outlet end connected to the filter, wherein the gas inlet device introduces gas from the gas source into the load lock chamber with its maximum flow rate when breaching the vacuum therein.

Abstract: A method of removing HDP oxide deposition comprises the steps of: (1) etching the HDP oxide deposition by in-side-out model, wherein the etching rate in the center of the substrate is faster than the edges of the substrate; (2) etching the HDP oxide deposition by out-side-in model, wherein the etching rate in the edges of the substrate is faster than the center of the substrate; and (3) removing the remaining silicon oxide layer using chemical-mechanical polishing (CMP). According to the method of the invention, the HDP oxide deposition can be planarized more uniform.

Abstract: The current invention provides a method for analyzing process variations that occur during integrated circuit fabrication. Critical dimension data is collected for each layer of the integrated circuit fabrication process for a period of time and a shift indicator that indicates variation in the critical dimension data for each layer of the integrated circuit fabrication process is calculated. A machine drift significance indicator is also calculated for each machine used in each layer of the integrated circuit fabrication process, and a maximum shift of mean value for each layer of the integrated circuit fabrication process is defined. The shift indicator, the maximum shift of mean value and the machine drift significance indicator are used to determine at least one likely cause of variation in critical dimension for each layer of the integrated circuit fabrication process.

Abstract: A method of removing HDP oxide deposition comprises the steps of: (1) etching the HDP oxide deposition by in-side-out model, wherein the etching rate in the center of the substrate is faster than the edges of the substrate; (2) etching the HDP oxide deposition by out-side-in model, wherein the etching rate in the edges of the substrate is faster than the center of the substrate; and (3) removing the remaining silicon oxide layer using chemical-mechanical polishing (CMP). According to the method of the invention, the HDP oxide deposition can be planarized more uniform.

Abstract: A method of removing ALF defects on a device after pad etching process, comprising the steps of: (a) applying EKC solution substantially comprising hydroxylamine (HDA) to the device for about 30 min; (b) applying an intermediate rinse chemical, such as Isopropyl alcohol (IPA) or N-methyl pyrrolidone (NMP), to the device for about 0.5 min to 3 min; and (c) applying water to the device. The ALF defects are effectively removed in the method of the invention, and the bad wafers can be turned to the good ones. Consequently, the primary cost during the manufacture is greatly decreased.

Abstract: A composition suitable for removing a polymer residue on a substrate in post metal solvent strip process substantially comprises water, alkanolamine and a sugar alcohol, and the amount of water is improved to about 20%. To remove the polymer residue, the composition of the invention is applied on a substrate for about 5 min to 15 min at a temperature ranged from about 60° C. to 70° C. The lifetime of the composition is greatly extended from 12 hours to 48 hours by increasing the amount of water from 15% to 20%.

Abstract: A gas conduit for a load lock chamber. The gas conduit connects to a gas source to introduce gas from the gas source into the load lock chamber of semiconductor equipment. The structure includes a filter mounted on the top surface of the load lock chamber, a pressure limitative device to maintain a preset pressure of gas source, and a gas inlet device including an inlet end connected to the pressure limitative device and an outlet end connected to the filter, wherein the gas inlet device introduces gas from the gas source into the load lock chamber with its maximum flow rate when breaching the vacuum therein.

Abstract: A method for eliminating residual polymers for cleaning etched windows of bonding pads. The invention provides a wafer with etched bonding pad windows that is free of residual polymer. Residual polymers induce an increase in the defect rate of cleaning process and bonding process. The wet stripping process peels Polyimide pieces from the surface of the passivation layer to form residual polymers on the wafer. The present invention utilizes the O2-ashing process to eliminate the residual polymers on the wafer. The present invention not only prevents Al—F formation on the bonding pads but also eliminates the residual polymers on the wafer. Therefore, the present invention may enhance the yield rate of semiconductor manufacturing by reducing the defect rates. The present invention does not increase the cost of the cleaning process but does increase the quality of the semiconductor.

Abstract: A method of removing sidewall polymer fence of the dielectric layer, which is a wet strip process using acidic SC1 and CR solutions, and SC1 solution is applied before CR solution. SC1 solution substantially comprises ammonium hydroxide, sulfuric acid and water for removing sidewall polymer fence, and CR solution substantially comprises sulfuric acid and hydrogen peroxide for removing photo-resist. The key of the wet strip process of the invention is that SC1 solution is applied at a low temperature for reducing the oxide loss. The wet strip process of the invention can completely remove the sidewall polymer fence and reduce the oxide loss of the dielectric layer.