Abstract: A neural network based method places flexible blocks on a chip canvas in an integrated circuit (IC) design. The neural network receives an input describing geometric features of a flexible block to be placed on the chip canvas. The geometric features includes an area size and multiple aspect ratios. The neural network generates a probability distribution over locations on the chip canvas and the aspect ratios of the flexible block. Based on the probability distribution, a location on the chip canvas is selected for placing the flexible block with a chosen aspect ratio.

Abstract: A neural network is used to place macros on a chip canvas in an integrated circuit (IC) design. The macros are first clustered into multiple macro clusters. Then the neural network generates a probability distribution over locations on a grid and aspect ratios of a macro cluster. The grid represents the chip canvas and is formed by rows and columns of grid cells. The macro cluster is described by at least an area size, aspect ratios, and wire connections. Action masks are generated for respective ones of the aspect ratios to block out a subset of unoccupied grid cells based on design rules that optimize macro placement. Then, by applying the action masks on the probability distribution, a masked probability distribution is generated. Based on the masked probability distribution, a location on the grid is selected for placing the macro cluster with a chosen aspect ratio.

Abstract: A Viterbi decoding apparatus includes a main decoder, a re-encoder, an adjusting module, a secondary decoder and a secondary result generating module. The main decoder performs a Viterbi decoding process on input data to generate a set of main decoded results. The re-encoder performs a convolutional encoding process on the set of main decoded results to generate a set of re-encoded results. The adjusting module adjusts the input data according to the set of re-encoded results to generate adjusted input data corresponding to a predetermined path in a Viterbi trellis diagram. The secondary decoder generates a plurality of symbols according to the adjusted input data. The secondary result generating module generates a set of secondary decoded results according to the plurality of symbols and the set of main decoded results.

Abstract: A Viterbi decoding apparatus includes a main decoder, a re-encoder, an adjusting module, a secondary decoder and a secondary result generating module. The main decoder performs a Viterbi decoding process on input data to generate a set of main decoded results. The re-encoder performs a convolutional encoding process on the set of main decoded results to generate a set of re-encoded results. The adjusting module adjusts the input data according to the set of re-encoded results to generate adjusted input data corresponding to a predetermined path in a Viterbi trellis diagram. The secondary decoder generates a plurality of symbols according to the adjusted input data. The secondary result generating module generates a set of secondary decoded results according to the plurality of symbols and the set of main decoded results.

Abstract: A digital broadcasting receiving system is provided. A receiving module receives an M number of symbols each carrying an N number of subcarriers of a control signal. A converting module performs FFT on respective kth subcarriers of an ith symbol and an (i+1)th symbol to generate an (i, k)th converted value and an (i+1, k)th converted value. A demodulating module performs differential demodulation on the (i, k)th and (i+1, k)th converted values to generate an (i, k)th demodulation value. A combining module soft-combines the (i, 1)th demodulation value through the (i, N)th demodulation value to generate an ith prediction value corresponding to the ith symbol. A determining module identifies a synchronization segment in the control signal according to the 1st prediction value to the (M?1)th prediction value.

Abstract: A digital broadcasting receiving system is provided. A receiving module receives an M number of symbols each carrying an N number of subcarriers of a control signal. A converting module performs FFT on respective kth subcarriers of an ith symbol and an (i+1)th symbol to generate an (i, k)th converted value and an (i+1, k)th converted value. A demodulating module performs differential demodulation on the (i, k)th and (i+1, k)th converted values to generate an (i, k)th demodulation value. A combining module soft-combines the (i, 1)th demodulation value through the (i, N)th demodulation value to generate an ith prediction value corresponding to the ith symbol. A determining module identifies a synchronization segment in the control signal according to the 1st prediction value to the (M?1)th prediction value.

Abstract: An apparatus for calibrating an audio-visual (AV) signal includes a controller for generating a control signal, a controllable filter for selectively filtering the AV signal in response to the control signal to output either the AV signal or a filtered AV signal; and a calibrator for generating a group of calibrating coefficients according to the filtered AV signal and calibrating the AV signal according to the group of calibrating coefficients.

Abstract: An analog television (TV) signal receiving circuit and method and an associated equalizer coefficient configuration apparatus and method are disclosed for correcting a distortion problem occurred in a reception process of an analog TV signal by configuring an equalizer in the analog TV signal receiving circuit. The analog TV signal receiving TV includes a tuner, an analog-to-digital converter (ADC), and a demodulator. The tuner receives an analog radio-frequency (RF) TV signal to generate an analog frequency down conversion signal. The ADC generates a digital frequency down conversion signal according to the analog frequency down conversion signal. The demodulator includes a front-end circuit for generating a digital demodulated signal according to the digital frequency down conversion signal, and an equalizer for generating a digital receiving signal according to the digital demodulated signal. The equalizer includes a plurality of correction coefficients that are generated according to a predetermined rule.

Abstract: An apparatus for calibrating an audio-visual (AV) signal includes a controller for generating a control signal, a controllable filter for selectively filtering the AV signal in response to the control signal to output either the AV signal or a filtered AV signal; and a calibrator for generating a group of calibrating coefficients according to the filtered AV signal and calibrating the AV signal according to the group of calibrating coefficients.

Abstract: An analog television (TV) signal receiving circuit and method and an associated equalizer coefficient configuration apparatus and method are disclosed for correcting a distortion problem occurred in a reception process of an analog TV signal by configuring an equalizer in the analog TV signal receiving circuit. The analog TV signal receiving TV includes a tuner, an analog-to-digital converter (ADC), and a demodulator. The tuner receives an analog radio-frequency (RF) TV signal to generate an analog frequency down conversion signal. The ADC generates a digital frequency down conversion signal according to the analog frequency down conversion signal. The demodulator includes a front-end circuit for generating a digital demodulated signal according to the digital frequency down conversion signal, and an equalizer for generating a digital receiving signal according to the digital demodulated signal. The equalizer includes a plurality of correction coefficients that are generated according to a predetermined rule.