Patents by Inventor Hsin-Fu Huang

Hsin-Fu Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130168744
    Abstract: The present invention provides a method of forming a semiconductor device having a metal gate. A substrate is provided and a gate dielectric and a work function metal layer are formed thereon, wherein the work function metal layer is on the gate dielectric layer. Then, a top barrier layer is formed on the work function metal layer. The step of forming the top barrier layer includes increasing a concentration of a boundary protection material in the top barrier layer. Lastly, a metal layer is formed on the top barrier layer. The present invention further provides a semiconductor device having a metal gate.
    Type: Application
    Filed: January 4, 2012
    Publication date: July 4, 2013
    Inventors: Chi-Mao Hsu, Hsin-Fu Huang, Chin-Fu Lin, Min-Chuan Tsai, Wei-Yu Chen, Chien-Hao Chen
  • Publication number: 20130113053
    Abstract: A semiconductor structure includes a substrate, a dielectric layer and a fluoride metal layer. The dielectric layer is located on the substrate. The fluoride metal layer is located on the dielectric layer. Furthermore, the present invention also provides a semiconductor process to form said semiconductor structure.
    Type: Application
    Filed: November 3, 2011
    Publication date: May 9, 2013
    Inventors: Kun-Hsien Lin, Chun-Hsien Lin, Hsin-Fu Huang
  • Patent number: 8420544
    Abstract: A method for fabricating an interconnection structure includes the following steps. Firstly, a substrate having a first conductive layer thereon is provided. Next, an ultra low-k material layer is formed on the substrate. Next, a portion of the ultra low-k material layer is removed, so as to form an opening to expose the first conductive layer. Next, a dry-cleaning process is performed by using gas, so as to clean a surface of the first conductive layer exposed by the opening. The dry-cleaning process is performed at a temperature in a range from the room temperature to 100° C.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: April 16, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Hsin-Fu Huang, Chi-Mao Hsu, Tsun-Min Cheng, Chin-Fu Lin
  • Publication number: 20130021778
    Abstract: In a touch panel, a cover lens, a sensor unit, and a panel cell are assembled first via glue to form a panel component, where a concave portion is also formed at the side of the panel component. An assembling frame is used to extend into the concave portion and covering around the side and bottom of a backlight module so as to assemble the panel component with the backlight module. Wrapping tape and further fixtures that were used to combine the backlight module and the cell may be removed to reduce the overall cost of the touch panel, while the yield rate of the adhering process may be effectively promoted since the adhering process is done simply on glass components.
    Type: Application
    Filed: October 3, 2011
    Publication date: January 24, 2013
    Inventors: Hsin-Fu Huang, Yu-Kai Huang
  • Publication number: 20120326243
    Abstract: A transistor having an aluminum metal gate includes a substrate, a high-k gate dielectric layer, an aluminum metal gate and a source/drain region. The high-k gate dielectric layer is disposed on the substrate. The aluminum metal gate includes a work function tuning layer and an aluminum metal layer disposed orderly on the high-k gate dielectric layer, where the aluminum metal layer comprises a first aluminum metal layer and a second aluminum metal layer. Furthermore, the source/drain region is disposed in the substrate at each of two sides of the aluminum metal gate.
    Type: Application
    Filed: June 22, 2011
    Publication date: December 27, 2012
    Inventors: Hsin-Fu Huang, Chi-Mao Hsu, Min-Chuan Tsai, Chin-Fu Lin, Chun-Hsien Lin
  • Publication number: 20120319179
    Abstract: A metal gate includes a substrate, a gate dielectric layer, a work function metal layer, an aluminum nitride layer and a stop layer. The gate dielectric layer is located on the substrate. The work function metal layer is located on the gate dielectric layer. The aluminum nitride layer is located on the work function metal layer. The stop layer is located on the aluminum nitride layer.
    Type: Application
    Filed: June 16, 2011
    Publication date: December 20, 2012
    Inventors: Hsin-Fu Huang, Zhi-Cheng Lee, Chi-Mao Hsu, Chin-Fu Lin, Kun-Hsien Lin, Tzung-Ying Lee, Min-Chuan Tsai
  • Publication number: 20120322218
    Abstract: A method for fabricating a semiconductor device includes the following steps. Firstly, a dummy gate structure having a dummy gate electrode layer is provided. Then, the dummy gate electrode layer is removed to form an opening in the dummy gate structure, thereby exposing an underlying layer beneath the dummy gate electrode layer. Then, an ammonium hydroxide treatment process is performed to treat the dummy gate structure. Afterwards, a metal material is filled into the opening.
    Type: Application
    Filed: June 16, 2011
    Publication date: December 20, 2012
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chien-Ming LAI, Yi-Wen Chen, Zhi-Cheng Lee, Tong-Jyun Huang, Che-Hua Hsu, Kun-Hsien Lin, Tzung-Ying Lee, Chi-Mao Hsu, Hsin-Fu Huang, Chin-Fu Lin
  • Publication number: 20120292721
    Abstract: A method of fabricating a semiconductor device includes following steps. A substrate is provided, wherein a first dielectric layer having a trench therein is formed on the substrate, a source/drain region is formed in the substrate at two sides of the trench, and a second dielectric layer is formed on the substrate in the trench. A first physical vapor deposition process is performed to form a Ti-containing metal layer in the trench. A second physical vapor deposition process is performed to form an Al layer on the Ti-containing metal layer in the trench. A thermal process is performed to anneal the Ti-containing metal layer and the Al layer so as to form a work function metal layer. A metal layer is formed to fill the trench.
    Type: Application
    Filed: May 17, 2011
    Publication date: November 22, 2012
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hsin-Fu Huang, Kun-Hsien Lin, Chi-Mao Hsu, Min-Chuan Tsai, Tzung-Ying Lee, Chin-Fu Lin
  • Publication number: 20120273902
    Abstract: A gate stack structure with an etch stop layer is provided. The gate stack structure is formed over a substrate. A spacer is formed on a sidewall of the gate stack structure. The gate stack structure includes a gate dielectric layer, a barrier layer, a repair layer and the etch stop layer. The gate dielectric layer is formed on the substrate. The barrier layer is formed on the gate dielectric layer. The barrier layer and an inner sidewall of the spacer collectively define a trench. The repair layer is formed on the barrier layer and an inner wall of the trench. The etch stop layer is formed on the repair layer.
    Type: Application
    Filed: April 27, 2011
    Publication date: November 1, 2012
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kun-Hsien LIN, Hsin-Fu Huang, Chi-Mao Hsu, Chin-Fu Lin, Chun-Yuan Wu
  • Publication number: 20120261770
    Abstract: A metal gate structure includes a high-K gate dielectric layer, an N-containing layer, a work function metal layer, and an N-trapping layer. The N-containing layer is positioned between the work function metal layer and the high-K gate dielectric layer. The N-trapping layer is positioned between the work function metal layer and the high-K gate dielectric layer, and the N-trapping layer contains no nitrogen or low-concentration nitrogen.
    Type: Application
    Filed: April 14, 2011
    Publication date: October 18, 2012
    Inventors: Kun-Hsien Lin, Hsin-Fu Huang, Tzung-Ying Lee, Min-Chuan Tsai, Chi-Mao Hsu, Chin-Fu Lin
  • Publication number: 20120256275
    Abstract: A manufacturing method of a metal gate structure includes first providing a substrate having a dummy gate formed thereon. The dummy gate includes a high-K gate dielectric layer, a bottom barrier layer, a first etch stop layer and a sacrificial layer sequentially and upwardly stacked on the substrate. Then, the sacrificial layer is removed to form a gate trench with the first etch stop layer exposed on the bottom of the gate trench. After forming the gate trench, a first work function metal layer is formed in the gate trench.
    Type: Application
    Filed: April 6, 2011
    Publication date: October 11, 2012
    Inventors: Hsin-Fu Huang, Chi-Mao Hsu, Kun-Hsien Lin, Chin-Fu Lin, Tzung-Ying Lee, Min-Chuan Tsai, Yi-Wei Chen, Bin-Siang Tsai, Ted Ming-Lang Guo, Ger-Pin Lin, Yu-Ling Liang, Yen-Ming Chen, Tsai-Yu Wen
  • Publication number: 20120244669
    Abstract: The present invention provides a method of manufacturing semiconductor device having metal gates. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench. Then, a first metal layer is formed in the first trench. The second sacrifice gate is removed to form a second trench. Next, a second metal layer is formed in the first trench and the second trench. Lastly, a third metal layer is formed on the second metal layer wherein the third metal layer is filled into the first trench and the second trench.
    Type: Application
    Filed: March 22, 2011
    Publication date: September 27, 2012
    Inventors: Po-Jui Liao, Tsung-Lung Tsai, Chien-Ting Lin, Shao-Hua Hsu, Yi-Wei Chen, Hsin-Fu Huang, Tzung-Ying Lee, Min-Chuan Tsai, Chan-Lon Yang, Chun-Yuan Wu, Teng-Chun Tsai, Guang-Yaw Hwang, Chia-Lin Hsu, Jie-Ning Yang, Cheng-Guo Chen, Jung-Tsung Tseng, Zhi-Cheng Lee, Hung-Ling Shih, Po-Cheng Huang, Yi-Wen Chen, Che-Hua Hsu
  • Publication number: 20120223397
    Abstract: A method for manufacturing a metal gate structure includes providing a substrate having a high-K gate dielectric layer and a bottom barrier layer sequentially formed thereon, forming a work function metal layer on the substrate, and performing an anneal treatment to the work function metal layer in-situ.
    Type: Application
    Filed: March 1, 2011
    Publication date: September 6, 2012
    Inventors: Chan-Lon Yang, Chi-Mao Hsu, Chun-Yuan Wu, Tzyy-Ming Cheng, Shih-Fang Tzou, Chin-Fu Lin, Hsin-Fu Huang, Min-Chuan Tsai
  • Publication number: 20110300706
    Abstract: A method for fabricating an interconnection structure includes the following steps. Firstly, a substrate having a first conductive layer thereon is provided. Next, an ultra low-k material layer is formed on the substrate. Next, a portion of the ultra low-k material layer is removed, so as to form an opening to expose the first conductive layer. Next, a dry-cleaning process is performed by using gas, so as to clean a surface of the first conductive layer exposed by the opening. The dry-cleaning process is performed at a temperature in a range from the room temperature to 100° C.
    Type: Application
    Filed: June 3, 2010
    Publication date: December 8, 2011
    Inventors: Hsin-Fu HUANG, Chi-Mao Hsu, Tsun-Min Cheng, Chin-Fu Lin
  • Patent number: 7586558
    Abstract: A direct type backlight unit having liftable frame structure includes a housing, an upper frame and a plurality of lamps, wherein the plurality of lamps disposed on a cavity defined by the housing and at least one has a foggy region. The upper frame is configured to accommodate a plurality of optical films and a liquid crystal panel and has two clip members for engaging with two connection hole of the housing such that the upper frame can be easily fixed on the housing. A plurality of lamp connection units are disposed within the cavity and each includes a conductive clamp member for clamping the conductive electrode of the lamp, thereby facilitating the replacement of the lamps.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: September 8, 2009
    Assignee: Hannstar Display Corp.
    Inventors: Hsin Fu Huang, Chin Jing Chen
  • Publication number: 20050086814
    Abstract: A cutter of juicer includes three arcuate blades arranged in equiangular positions and at different horizontal levels. Each blade has a convex side forming a plurality of serrate knife teeth for reaming foods rapidly when the blades rotate.
    Type: Application
    Filed: October 27, 2003
    Publication date: April 28, 2005
    Inventor: Hsin-Fu Huang
  • Publication number: 20030116165
    Abstract: An earpiece having a hollow cylindrical earpiece body and a diaphragm suspended at one end of the hollow cylindrical earpiece body for protecting the ear against outside water and for enabling the ear to hear a certain volume of sound.
    Type: Application
    Filed: December 21, 2001
    Publication date: June 26, 2003
    Inventor: Hsin-Fu Huang
  • Patent number: D498642
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: November 23, 2004
    Inventor: Hsin-Fu Huang
  • Patent number: D499303
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: December 7, 2004
    Inventor: Hsin-Fu Huang
  • Patent number: D428301
    Type: Grant
    Filed: April 7, 1999
    Date of Patent: July 18, 2000
    Inventor: Hsin-Fu Huang