Patents by Inventor Hsin-Jung Chen

Hsin-Jung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170299
    Abstract: A method for manufacturing a semiconductor device includes: providing a wafer-bonding stack structure having a sidewall layer and an exposed first component layer; forming a photoresist layer on the first component layer; performing an edge trimming process to at least remove the sidewall layer; and removing the photoresist layer. In this way, contaminant particles generated from the blade during the edge trimming process may fall on the photoresist layer but not fall on the first component layer, so as to protect the first component layer from being contaminated.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Inventors: KUN-JU LI, ANG CHAN, HSIN-JUNG LIU, WEI-XIN GAO, JHIH-YUAN CHEN, CHUN-HAN CHEN, ZONG-SIAN WU, CHAU-CHUNG HOU, I-MING LAI, FU-SHOU TSAI
  • Publication number: 20240154015
    Abstract: A method includes forming a first fin and a second fin protruding from a frontside of a substrate, forming a gate stack over the first and second fins, forming a dielectric feature dividing the gate stack into a first segment engaging the first fin and a second segment engaging the second fin, and growing a first epitaxial feature on the first fin and a second epitaxial feature on the second fin. The dielectric feature is disposed between the first and second epitaxial features. The method also includes performing an etching process on a backside of the substrate to form a backside trench, and forming a backside via in the backside trench. The backside trench exposes the dielectric feature and the first and second epitaxial features. The backside via straddles the dielectric feature and is in electrical connection with the first and second epitaxial features.
    Type: Application
    Filed: March 22, 2023
    Publication date: May 9, 2024
    Inventors: Jui-Lin CHEN, Hsin-Wen SU, Chih-Ching WANG, Chen-Ming LEE, Chung-I YANG, Yi-Feng TING, Jon-Hsu HO, Lien-Jung HUNG, Ping-Wei WANG
  • Patent number: 11978740
    Abstract: A layer stack including a first bonding dielectric material layer, a dielectric metal oxide layer, and a second bonding dielectric material layer is formed over a top surface of a substrate including a substrate semiconductor layer. A conductive material layer is formed by depositing a conductive material over the second bonding dielectric material layer. The substrate semiconductor layer is thinned by removing portions of the substrate semiconductor layer that are distal from the layer stack, whereby a remaining portion of the substrate semiconductor layer includes a top semiconductor layer. A semiconductor device may be formed on the top semiconductor layer.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Harry-Hak-Lay Chuang, Kuo-Ching Huang, Wei-Cheng Wu, Hsin Fu Lin, Henry Wang, Chien Hung Liu, Tsung-Hao Yeh, Hsien Jung Chen
  • Publication number: 20240145398
    Abstract: A carrier structure is provided, in which at least one positioning area is defined on a chip-placement area of a package substrate, and at least one alignment portion is disposed on the positioning area. Therefore, the precision of manufacturing the alignment portion is improved by disposing the positioning area on the chip-placement area, such that the carrier structure can provide a better alignment mechanism for the chip placement operation.
    Type: Application
    Filed: December 8, 2022
    Publication date: May 2, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Cheng-Liang HSU, Wan-Rou CHEN, Hsin-Yin CHANG, Tsung-Li LIN, Hsiu-Jung LI, Chiu-Lien LI, Fu-Quan XU, Yi-Wen LIU, Chih-Chieh SUN
  • Publication number: 20240123311
    Abstract: An artificial shuttlecock includes a ball head, a plurality of feathers, and a plurality of stems. Each of the feathers includes a notch. The notch is disposed on an outer edge of the feather. A ball head end of the stem is connected to the ball head, and a feather end is connected to the feather. The stem includes a body, which tapers from the end close to the ball end to the feather end. The end of the body close to the ball end has a first width, and the body has a second width at the feather. The first width is between 2.1 mm and 2.4 mm, and the second width is between 0.4 mm and 0.6 mm.
    Type: Application
    Filed: October 6, 2023
    Publication date: April 18, 2024
    Inventors: SHU-JUNG CHEN, TZU-WEI WANG, HSIN-CHEN WANG
  • Publication number: 20240105644
    Abstract: A semiconductor die package includes a high dielectric constant (high-k) dielectric layer over a device region of a first semiconductor die that is bonded with a second semiconductor die in a wafer on wafer (WoW) configuration. A through silicon via (TSV) structure may be formed through the device region. The high-k dielectric layer has an intrinsic negative charge polarity that provides a coupling voltage to modify the electric potential in the device region. In particular, the electron carriers in high-k dielectric layer attracts hole charge carriers in device region, which suppresses trap-assist tunnels that result from surface defects formed during etching of the recess for the TSV structure. Accordingly, the high-k dielectric layer described herein reduces the likelihood of (and/or the magnitude of) current leakage in semiconductor devices that are included in the device region of the first semiconductor die.
    Type: Application
    Filed: January 6, 2023
    Publication date: March 28, 2024
    Inventors: Tsung-Hao YEH, Chien Hung LIU, Hsien Jung CHEN, Hsin Heng WANG, Kuo-Ching HUANG
  • Patent number: 11923205
    Abstract: A method for manufacturing a semiconductor device includes: providing a wafer-bonding stack structure having a sidewall layer and an exposed first component layer; forming a photoresist layer on the first component layer; performing an edge trimming process to at least remove the sidewall layer; and removing the photoresist layer. In this way, contaminant particles generated from the blade during the edge trimming process may fall on the photoresist layer but not fall on the first component layer, so as to protect the first component layer from being contaminated.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: March 5, 2024
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Kun-Ju Li, Ang Chan, Hsin-Jung Liu, Wei-Xin Gao, Jhih-Yuan Chen, Chun-Han Chen, Zong-Sian Wu, Chau-Chung Hou, I-Ming Lai, Fu-Shou Tsai
  • Publication number: 20240071988
    Abstract: A method for manufacturing a semiconductor structure is provided. The method includes: providing a substrate and a dielectric layer on the substrate; forming a hole in the dielectric layer; forming an initial barrier material layer and a conductive layer on an upper surface of the dielectric layer and in the hole; removing part of the initial barrier material layer and part of the conductive layer to form a barrier material layer and a via element in the hole respectively and expose the upper surface of the dielectric layer. An upper surface of the barrier material layer is higher than the upper surface of the dielectric layer.
    Type: Application
    Filed: October 11, 2022
    Publication date: February 29, 2024
    Inventors: Kun-Ju LI, Hsin-Jung LIU, Wei-Xin GAO, Jhih-Yuan CHEN, Ang CHAN, Chau-Chung HOU
  • Patent number: 9865083
    Abstract: An apparatus and a method for rendering three-dimensional stereoscopic images are provided. The apparatus comprises a multi-view processor, an object device, a depth device, and a block filling device. The multi-view processor obtains depth related data of a first pixel and a second pixel which are adjacent to each other on the input image, calculates a difference between the depth related data and determines whether the first pixel and the second pixel are continuous according to the difference. The object device executes a process of object detection to output contour information. The depth device executes a process of object judgment to output distance information. The block filling device detects a hole region in each viewpoint image, searches a search region adjacent to the hole region for a number of original pixels, and fills the hole region.
    Type: Grant
    Filed: March 19, 2015
    Date of Patent: January 9, 2018
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hsin-Jung Chen, Feng-Hsiang Lo, Sheng-Dong Wu, Ming-Yu Lin, Chun-Te Wu, Hao-Wei Peng
  • Patent number: 9147021
    Abstract: A computer implemented data processing method for recursively approximating a proper value for a target matrix includes the following steps of: determining whether the target matrix corresponds to a low complexity condition; if so, obtaining a first updated target matrix according to a first variance, relevant to a second iteration parameter, and a first iteration parameter, wherein the first and the second iteration parameters correspond to fixed values; if not, obtaining a second updated target matrix according to a second variance, relevant to a fourth iteration parameter, and a third iteration parameter, wherein the third and the fourth parameters are related to the target matrix.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: September 29, 2015
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hsin-Jung Chen, Feng-Hsiang Lo
  • Publication number: 20150193965
    Abstract: An apparatus and a method for rendering three-dimensional stereoscopic images are provided. The apparatus comprises a multi-view processor, an object device, a depth device, and a block filling device. The multi-view processor obtains depth related data of a first pixel and a second pixel which are adjacent to each other on the input image, calculates a difference between the depth related data and determines whether the first pixel and the second pixel are continuous according to the difference. The object device executes a process of object detection to output contour information. The depth device executes a process of object judgment to output distance information. The block filling device detects a hole region in each viewpoint image, searches a search region adjacent to the hole region for a number of original pixels, and fills the hole region.
    Type: Application
    Filed: March 19, 2015
    Publication date: July 9, 2015
    Inventors: Hsin-Jung Chen, Feng-Hsiang Lo, Sheng-Dong Wu, Ming-Yu Lin, Chun-Te Wu, Hao-Wei Peng
  • Publication number: 20140197804
    Abstract: Disclosed is a charging system and a charging method thereof. The charging system is applicable for charging an electronic device by at least a charging device and includes a detecting module configured to detect a voltage of a power storage unit of the electronic device; and a control module. When the electronic device is in a turned-off state, the control module is configured to conduct charging the power storage unit by a first current of one of said at least a charging device, upon judging that the voltage is substantially lower than a first value, and the control module is also configured to conduct charging the power storage unit by a second current of one of said at least a charging device, upon judging that the voltage is substantially higher than or equal to the first value.
    Type: Application
    Filed: January 15, 2014
    Publication date: July 17, 2014
    Applicants: Inventec Appliances (Pudong) Corporation, INVENTEC APPLIANCES (SHANGHAI) CO., LTD, INVENTEC APPLIANCES CORP.
    Inventors: I-Hsiu LIN, Sheng-Hung WANG, Hsin-Jung CHEN
  • Patent number: 8698797
    Abstract: A method and a device for generating a multi-views three-dimensional (3D) stereoscopic image are based on displaying positions of target image elements of each view image of a multi-views 3D stereoscopic image in a 3D stereo display. Source image elements suitable to be displayed at each displaying position are obtained from a 2D-depth mixed image formed by combining a source 2D image and a corresponding depth map through an inverse view image searching manner, thereby generating a multi-views 3D stereoscopic image from the set target image elements for being displayed in the 3D stereo display.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: April 15, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Hsin Jung Chen, Feng Hsiang Lo, Sheng Dong Wu
  • Publication number: 20130127834
    Abstract: A computer implemented data processing method for recursively approximating a proper value for a target matrix includes the following steps of: determining whether the target matrix corresponds to a low complexity condition; if so, obtaining a first updated target matrix according to a first variance, relevant to a second iteration parameter, and a first iteration parameter, wherein the first and the second iteration parameters correspond to fixed values; if not, obtaining a second updated target matrix according to a second variance, relevant to a fourth iteration parameter, and a third iteration parameter, wherein the third and the fourth parameters are related to the target matrix.
    Type: Application
    Filed: April 5, 2012
    Publication date: May 23, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hsin-Jung Chen, Feng-Hsiang Lo
  • Publication number: 20120105435
    Abstract: An apparatus and a method for rendering three-dimensional stereoscopic images are provided. The apparatus is for use in a three-dimensional image processing system which generates viewpoint images according to an input image and an input depth. The apparatus comprises an object device, a depth device, and a block filling device. The object device executes a process of object detection to output contour information according to the input image. The depth device executes a process of object judgment to output distance information according to the input depth. The block filling device detects a hole region in each viewpoint image, searches a search region adjacent to the hole region for a number of original pixels, and fills the hole region according to the original pixels, the contour information, and the distance information.
    Type: Application
    Filed: February 23, 2011
    Publication date: May 3, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hsin-Jung Chen, Feng-Hsiang Lo, Sheng-Dong Wu, Ming-Yu Lin
  • Publication number: 20110157159
    Abstract: A method and a device for generating a multi-views three-dimensional (3D) stereoscopic image are based on displaying positions of target image elements of each view image of a multi-views 3D stereoscopic image in a 3D stereo display. Source image elements suitable to be displayed at each displaying position are obtained from a 2D-depth mixed image formed by combining a source 2D image and a corresponding depth map through an inverse view image searching manner, thereby generating a multi-views 3D stereoscopic image from the set target image elements for being displayed in the 3D stereo display.
    Type: Application
    Filed: November 19, 2010
    Publication date: June 30, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hsin Jung Chen, Feng Hsiang Lo, Sheng Dong Wu
  • Publication number: 20100115153
    Abstract: An adaptive multi-channel controller and its method for a storage device are provided for data transmission between a host and the storage device. The storage device is configured to have multiple channels. A channel use amount is determined based on a data access amount of the host. Then, activated channels are selected among the channels according to the channel use amount. The data transmission is then carried out through the selected channels.
    Type: Application
    Filed: February 19, 2009
    Publication date: May 6, 2010
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Feng-Hsiang Lo, Kuo-Hsin Lai, Fu-Chiang Jan, Chia-Hang Ho, Hsin-Jung Chen, Chin-Yuan Wang, Po-Chang Chen