Patents by Inventor Hsin Wang

Hsin Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240176093
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Inventors: Chao-Chang HU, Chih-Wei WENG, Chia-Che WU, Chien-Yu KAO, Hsiao-Hsin HU, He-Ling CHANG, Chao-Hsi WANG, Chen-Hsien FAN, Che-Wei CHANG, Mao-Gen JIAN, Sung-Mao TSAI, Wei-Jhe SHEN, Yung-Ping YANG, Sin-Hong LIN, Tzu-Yu CHANG, Sin-Jhong SONG, Shang-Yu HSU, Meng-Ting LIN, Shih-Wei HUNG, Yu-Huai LIAO, Mao-Kuo HSU, Hsueh-Ju LU, Ching-Chieh HUANG, Chih-Wen CHIANG, Yu-Chiao LO, Ying-Jen WANG, Shu-Shan CHEN, Che-Hsiang CHIU
  • Publication number: 20240165170
    Abstract: The present invention provides a method for preventing and/or treating a NSAID-induced gastric ulcer. The method comprises administrating an effective amount of a lactic acid bacterium set to a subject. The lactic acid bacterium set comprises Lactobacillus plantarum GKD7 and Pediococcus acidilactici GKA4.
    Type: Application
    Filed: March 6, 2023
    Publication date: May 23, 2024
    Applicant: GRAPE KING BIO LTD.
    Inventors: Chin-Chu CHEN, Yen-Lien CHEN, Shin-Wei LIN, You-Shan TSAI, Ci-Sian WANG, Yu-Hsin HOU, Yang-Tzu SHIH, Ching-Wen LIN, Ya-Jyun CHEN, Jia-Lin JIANG, Zi-He WU, Yen-Po CHEN, Tzu Chun LIN
  • Patent number: 11982866
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: May 14, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
  • Patent number: 11978740
    Abstract: A layer stack including a first bonding dielectric material layer, a dielectric metal oxide layer, and a second bonding dielectric material layer is formed over a top surface of a substrate including a substrate semiconductor layer. A conductive material layer is formed by depositing a conductive material over the second bonding dielectric material layer. The substrate semiconductor layer is thinned by removing portions of the substrate semiconductor layer that are distal from the layer stack, whereby a remaining portion of the substrate semiconductor layer includes a top semiconductor layer. A semiconductor device may be formed on the top semiconductor layer.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Harry-Hak-Lay Chuang, Kuo-Ching Huang, Wei-Cheng Wu, Hsin Fu Lin, Henry Wang, Chien Hung Liu, Tsung-Hao Yeh, Hsien Jung Chen
  • Publication number: 20240139262
    Abstract: The present disclosure relates to a complex probiotic composition and a method for improving exercise performance of a subject with low intrinsic aerobic exercise capacity. The complex probiotic composition, which includes Lactobacillus rhamnosus GKLC1, Bifidobacterium lactis GKK24 and Clostridium butyricum GKB7, administered to the subject with the low intrinsic aerobic exercise capacity in a continuation period, can effectively reduce serum lactic acid and serum urea nitrogen after aerobic exercise, reduce proportion of offal fat and/or increase liver and muscle glycogen contents, thereby being as an effective ingredient for preparation of various compositions.
    Type: Application
    Filed: October 13, 2023
    Publication date: May 2, 2024
    Inventors: Chin-Chu CHEN, Yen-Lien CHEN, Shih-Wei LIN, Yen-Po CHEN, Ci-Sian WANG, Yu-Hsin HOU, Yang-Tzu SHIH, Ching-Wen LIN, Ya-Jyun CHEN, Jia-Lin JIANG, You-Shan TSAI, Zi-He WU
  • Publication number: 20240142732
    Abstract: A method includes forming a first waveguide over a substrate; forming a first layer of low-dimensional material on the first waveguide; forming a first layer of dielectric material over the first layer of low-dimensional material; forming a second layer of low dimensional material on the first layer of dielectric material; and forming a first conductive contact that electrically contacts the first layer of low-dimensional material and a second conductive contact that electrically contacts the second layer of low-dimensional material.
    Type: Application
    Filed: January 6, 2023
    Publication date: May 2, 2024
    Inventors: Chih-Hsin Lu, Chin-Her Chien, Chung-Hao Tsai, Chuei-Tang Wang, Chen-Hua Yu
  • Patent number: 11973162
    Abstract: A manufacturing method for a flexible silicon-based cell module is provided. Specifically, cell units of a silicon-based solar cell structure are arranged and adhered to a connecting strip to form a cell string, wherein a gap is left between two adjacent cell units. The cell units in cell strings are connected in series and parallel by an interconnected bar, wherein a gap is left between two adjacent cell strings. Hard protection units adapted to the size and specification of the cell units are respectively attached to the cell units. A plurality of cell strings are connected to each other in series and parallel to form a cell assembly. A panel made of flexible material is selected to package the cell assembly to form the flexible cell module. The cell module has an excellent rollable performance and a flexible expansion, a light weight, and a small size.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: April 30, 2024
    Assignee: GOLDEN SOLAR (QUANZHOU) NEW ENERGY TECHNOLOGY CO., LTD.
    Inventor: Hsin-wang Chiu
  • Publication number: 20240136546
    Abstract: A vacuum battery structural assembly and a vacuum multi-cell battery module composed thereof are provided and include a first repeating unit including a first frame plate and a second frame plate with respect to the first frame plate; and an electrolyte channel defined within the first frame plate and the second frame plate to accommodate a liquid electrolyte, wherein both a surface of the first frame plate and a surface of the second frame plate include a vacuum suction area, the vacuum suction area includes a vacuum aperture and a vacuum channel, wherein the vacuum aperture is formed on at least one surface of the first frame plate and the second frame plate, the vacuum channel is positioned inside the first frame plate and the second frame plate, and is configured to generate a longitudinal pressing suction force and seal the first frame plate and the second frame plate.
    Type: Application
    Filed: November 23, 2022
    Publication date: April 25, 2024
    Inventors: Hung-Hsien Ku, Shang-Qing Zhuang, Ning-Yih Hsu, Chien-Hong Lin, Han-Jou Lin, Yi-Hsin Hu, Po-Yen Chiu, Yao-Ming Wang
  • Patent number: 11966170
    Abstract: A method includes receiving a wafer, measuring a surface topography of the wafer; calculating a topographical variation based on the surface topography measurement performing a single-zone alignment compensation when the topographical variation is less than a predetermined value or performing a multi-zone alignment compensation when the topographical variation is greater than the predetermined value; and performing a wafer alignment according to the single-zone alignment compensation or the multi-zone alignment compensation.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ai-Jen Hung, Yung-Yao Lee, Heng-Hsin Liu, Chin-Chen Wang, Ying Ying Wang
  • Publication number: 20240124546
    Abstract: Provided herein are activatable cytokine constructs that include: (a) a first monomer construct comprising a first peptide mask (PM1), a third cleavable moiety (CM3), a first mature cytokine protein (CP1), a first cleavable moiety (CM1), and a first dimerization domain (DD1), wherein the CM1 is positioned between the CP1 and the DD1, and the CM3 is positioned between the PM1 and CP1; and (b) a second monomer construct comprising a second mature cytokine protein (CP2), a second cleavable moiety (CM2), and a second dimerization domain (DD2), where the CM2 is positioned between the CP2 and the DD2, where: the DD1 and the DD2 bind each other; and where the ACC is characterized by a reduction in at least one activity of the CP1 and/or CP2 as compared to a control level of the at least one activity of the CP1 and/or CP2.
    Type: Application
    Filed: May 25, 2023
    Publication date: April 18, 2024
    Applicant: CytomX Therapeutics, Inc.
    Inventors: Sayantan MITRA, Nicole G. LAPUYADE, Hikmat Haizar ASSI, Madan M. PAIDHUNGAT, Dylan L. DANIEL, Erwan LE SCOLAN, Walter A. BOGDANOFF, Na CAI, Hsin WANG, Alexey Yevgenyevich BEREZHNOY
  • Patent number: 11961808
    Abstract: At least some embodiments of the present disclosure relate to an electronic package structure. The electronic package structure includes an electronic structure, a wiring structure disposed over the electronic structure, a bonding element connecting the wiring structure and the electronic structure, and a reinforcement element attached to the wiring structure. An elevation difference between a highest point and a lowest point of a surface of the wiring structure facing the electronic structure is less than a height of the bonding element.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: April 16, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Jen Wang, Po-Jen Cheng, Fu-Yuan Chen, Yi-Hsin Cheng
  • Publication number: 20240121940
    Abstract: A semiconductor device and a method of manufacturing the semiconductor device are provided. The semiconductor device includes a substrate, a word line, a first capacitor, a second capacitor, a first bit line and a second bit line. The word line is disposed on the substrate and extends along a first direction. The first capacitor extends along a second direction different from the first direction and is located at a first level. The second capacitor extends along the second direction and is located at a second level different from the first level. The first bit line is electrically connected to the first capacitor and the word line. The second bit line is electrically connected to the second capacitor and the word line.
    Type: Application
    Filed: July 13, 2023
    Publication date: April 11, 2024
    Inventors: SHIH-FAN KUAN, HSU-CHENG FAN, JIANN-JONG WANG, CHUNG-HSIN LIN, YU-TING LIN
  • Publication number: 20240121939
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a word line, a first capacitor, a second capacitor, a first bit line and a second bit line. The word line is disposed on the substrate and extends along a first direction. The first capacitor extends along a second direction different from the first direction and is located at a first level. The second capacitor extends along the second direction and is located at a second level different from the first level. The first bit line is electrically connected to the first capacitor and the word line. The second bit line is electrically connected to the second capacitor and the word line.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 11, 2024
    Inventors: SHIH-FAN KUAN, HSU-CHENG FAN, JIANN-JONG WANG, CHUNG-HSIN LIN, YU-TING LIN
  • Publication number: 20240118565
    Abstract: An electronic device is provided. The electronic device includes a display panel, a light-controlling layer, a retardation layer, and a first linear polarizer. The light-controlling layer is disposed between the display panel and the retardation layer. The retardation layer is disposed between the light-controlling layer and the first linear polarizer. A first transmission direction of the first linear polarizer is different from a second transmission direction of at least a portion of an incident light. The incident light passes through the retardation layer so as to enter the first linear polarizer.
    Type: Application
    Filed: September 6, 2023
    Publication date: April 11, 2024
    Inventors: Jo-Hsin WANG, Hong-Sheng HSIEH
  • Publication number: 20240119888
    Abstract: An electronic device includes a gamma data source, a signal receiving circuit, a buffer circuit, a counter, a multiplexer, and a gamma processing unit. The signal receiving circuit receives source data, and correspondingly generates a grayscale value. The buffer circuit electrically couples the signal receiving circuit and stores the grayscale value. The counter receives a system clock signal to generate a sequence number. The multiplexer electrically couples the counter and the gamma data source. The multiplexer receives the sequence number. The multiplexer outputs a bit message corresponding to the sequence number in the gamma data source. The gamma processing unit electrically couples the multiplexer and the buffer circuit. The gamma processing unit receives the bit message from the multiplexer. The gamma processing unit receives the grayscale value from the buffer circuit. The gamma processing unit outputs a bit value corresponding to the grayscale value in the bit message.
    Type: Application
    Filed: September 6, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Hsin FENG, Chong-De WANG, Yung-Hsin CHANG
  • Patent number: 11953839
    Abstract: In a method of cleaning a lithography system, during idle mode, a stream of air is directed, through a first opening, into a chamber of a wafer table of an EUV lithography system. One or more particles is extracted by the directed stream of air from surfaces of one or more wafer chucks in the chamber of the wafer table. The stream of air and the extracted one or more particle are drawn, through a second opening, out of the chamber of the wafer table.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Yu Tu, Shao-Hua Wang, Yen-Hao Liu, Chueh-Chi Kuo, Li-Jui Chen, Heng-Hsin Liu
  • Patent number: 11955317
    Abstract: A radio frequency (RF) match assembly for a chemical vapor deposition processing chamber. The assembly includes a top electrically insulating column and a bottom electrically insulating column. The assembly further includes a one-piece RF match strap that has a head, a main body and a body extension. The main body of the one-piece RF match strap is configured to extend through the top electrically insulating column and the bottom electrically insulating column. A flexible chamber lid strap connects the processing chamber to the top of the one piece RF match strap.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Sze Chen, Yu Li Wang, Yin-Tun Chou, Yuan-Hsin Chi, Sheng-Yuan Lin
  • Patent number: 11955507
    Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: April 9, 2024
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Hsin-Hung Li, Wei-Syun Wang, Chih-Chiang Chen, Yu-Cheng Shih, Cheng-Chan Wang, Chia-Hsin Chung, Ming-Jui Wang, Sheng-Ming Huang
  • Publication number: 20240100880
    Abstract: A multi-piece wheel frame includes a rim and a disc. The rim includes a barrel, and an outer rim portion protruding outwardly from the barrel. The outer rim portion forms an inclined surface, and a ring edge surface connected to an outer edge of the inclined surface and cooperating with the inclined surface to form an obtuse angle. The disc is fixed to the rim, and includes a disc core, a plurality of spoke portions extending radially outwardly from the disc core, and a reinforced ring portion connected to the spoke portions and fixed to the outer rim portion. The reinforced ring portion abuts against at least one of the inclined surface and the ring edge surface.
    Type: Application
    Filed: November 16, 2022
    Publication date: March 28, 2024
    Inventors: Te-Fu HSIAO, Che-Hao KUO, Chung-Hsin CHANG, Chia-Hsin WANG, Erh-Wei LIU
  • Publication number: 20240105480
    Abstract: A wafer storage elevator and method for detecting wafer position shift. The elevator includes a first storage elevator sidewall, a second storage elevator sidewall, and a storage seat positioned between the first and second storage elevator sidewalls. A first mirror block is coupled to a front side of the storage seat having a mirror positioned on a top surface of the block, and a second mirror block is coupled to the front side of the storage seat having a mirror that is positioned on the top surface of the second mirror block. The mirror of the first mirror block reflects a laser beam from an emission sensor to the second mirror block, and the mirror of the second mirror block reflects the laser beam from the mirror of the first mirror block to a receive sensor. A wafer misalignment is determined based upon an output of the receive sensor.
    Type: Application
    Filed: January 4, 2023
    Publication date: March 28, 2024
    Inventors: Ming-Sze Chen, Yuan-Hsin Chi, Hung-Chih Wang, Sheng-Yuan Lin