Abstract: A semiconductor device includes a substrate, two source/drain features over the substrate, channel layers connecting the two source/drain features, and a gate structure wrapping around each of the channel layers. Each of the two source/drain features include a first epitaxial layer, a second epitaxial layer over the first epitaxial layer, and a third epitaxial layer on inner surfaces of the second epitaxial layer. The channel layers directly interface with the second epitaxial layers and are separated from the third epitaxial layers by the second epitaxial layers. The first epitaxial layers include a first semiconductor material with a first dopant. The second epitaxial layers include the first semiconductor material with a second dopant. The second dopant has a higher mobility than the first dopant.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip (IC). The method includes forming a first fin of semiconductor material and a second fin of semiconductor material within a semiconductor substrate. A gate structure is formed over the first fin and source/drain regions are formed on or within the first fin. The source/drain regions are formed on opposite sides of the gate structure. One or more pick-up regions are formed on or within the second fin. The source/drain regions respectively have a first width measured along a first direction parallel to a long axis of the first fin and the one or more pick-up regions respectively have a second width measured along the first direction. The second width is larger than the first width.

Abstract: The present disclosure provides an electronic module including a circuit including a transmitting part and a receiving part physically separated from the transmitting part. The electronic module also includes an element isolated from the circuit and configured to block electrical interference between the transmitting part and the receiving part.

Abstract: A carrier structure is provided, in which at least one positioning area is defined on a chip-placement area of a package substrate, and at least one alignment portion is disposed on the positioning area. Therefore, the precision of manufacturing the alignment portion is improved by disposing the positioning area on the chip-placement area, such that the carrier structure can provide a better alignment mechanism for the chip placement operation.

Abstract: A method of forming an integrated circuit, including forming a n-type doped well (N-well) and a p-type doped well (P-well) disposed side by side on a semiconductor substrate, forming a first fin active region extruded from the N-well and a second fin active region extruded from the P-well, forming a first isolation feature inserted between and vertically extending through the N-well and the P-well, and forming a second isolation feature over the N-well and the P-well and laterally contacting the first and the second fin active regions.

Abstract: A memory device includes a substrate, a first transistor and a second transistor, a first word line, a second word line, and a bit line. The first transistor and the second transistor are over the substrate and are electrically connected to each other, in which each of the first and second transistors includes first semiconductor layers and second semiconductor layers, a gate structure, and source/drain structures, in which the first semiconductor layers are in contact with the second semiconductor layers, and a width of the first semiconductor layers is narrower than a width of the second semiconductor layers. The first word line is electrically connected to the gate structure of the first transistor. The second word line is electrically connected to the gate structure of the second transistor. The bit line is electrically connected to a first one of the source/drain structures of the first transistor.

Abstract: A method of fabricating a device includes providing a fin element in a device region and forming a dummy gate over the fin element. In some embodiments, the method further includes forming a source/drain feature within a source/drain region adjacent to the dummy gate. In some cases, the source/drain feature includes a bottom region and a top region contacting the bottom region at an interface interposing the top and bottom regions. In some embodiments, the method further includes performing a plurality of dopant implants into the source/drain feature. In some examples, the plurality of dopant implants includes implantation of a first dopant within the bottom region and implantation of a second dopant within the top region. In some embodiments, the first dopant has a first graded doping profile within the bottom region, and the second dopant has a second graded doping profile within the top region.

Abstract: A semiconductor memory device includes a first word line formed over a first active region. In some embodiments, a first metal line is disposed over and perpendicular to the first word line, where the first metal line is electrically connected to the first word line using a first conductive via, and where the first conductive via is disposed over the first active region. In some examples, the semiconductor memory device further includes a second metal line and a third metal line both parallel to the first metal line and disposed on opposing sides of the first metal line, where the second metal line is electrically connected to a source/drain region of the first active region using a second conductive via, and where the third metal line is electrically connected to the source/drain region of the first active region using a third conductive via.

Abstract: An apparatus for producing silicon carbide crystal is provided and includes a composite structure formed by a plurality of graphite layers and silicon carbide seed crystals, wherein a density or thickness of each layer of graphite is gradually adjusted to reduce a difference of a thermal expansion coefficient and Young's modulus between the graphite layers and silicon carbide. The composite structure can be stabilized on a top portion or an upper cover of a crucible made of graphite, thereby preventing the silicon carbide crystal from falling off.

Abstract: An optical communication system includes an optical module and a host. The optical module has a fiber connector and a laser condition pin, wherein the fiber connector is configured to connect to a laser output of an external laser source. The optical module is configured to set an output of the laser condition pin to have a first value when detecting a laser beam through the fiber connector. The host is connected to the laser condition pin and has a control connector, wherein the control connector is configured to connect to the external laser source. The host is configured to output a release signal through the control connector when detecting the first value on the laser condition pin, wherein the release signal changes the laser output from outputting a laser beam having a first power to outputting a laser beam having a second power higher than the first power.

Abstract: A serial peripheral interface circuit includes a serial peripheral interface device with a master-in-slave-out (MISO) line, a master-out-slave-in (MOSI) line, a serial clock (SCLK) line and a slave select (SS) line, a first conducting line, a second conducting line, a first resistor connecting the MISO line and the first conducting line, and a second resistor connecting the MOSI line and the second conducting line.

Abstract: A serial peripheral interface circuit includes a serial peripheral interface device with a master-in-slave-out (MISO) line, a master-out-slave-in (MOSI) line, a serial clock (SCLK) line and a slave select (SS) line, a first conducting line, a second conducting line, a first resistor connecting the MISO line and the first conducting line, and a second resistor connecting the MOSI line and the second conducting line.

Abstract: An optical communication system includes an optical module and a host. The optical module has a fiber connector and a laser condition pin, wherein the fiber connector is configured to connect to a laser output of an external laser source. The optical module is configured to set an output of the laser condition pin to have a first value when detecting a laser beam through the fiber connector. The host is connected to the laser condition pin and has a control connector, wherein the control connector is configured to connect to the external laser source. The host is configured to output a release signal through the control connector when detecting the first value on the laser condition pin, wherein the release signal changes the laser output from outputting a laser beam having a first power to outputting a laser beam having a second power higher than the first power.

Abstract: A multi-leaf solar energy supplying apparatus includes an energy converting module and an electrical power storing module. The energy converting module includes a solar energy board having a plurality of leaves for converting solar energy into electrical power. The electrical power storing module is electrically connected with the energy converting module for receiving electrical power to charge a secondary battery. Therefore, the secondary battery provides at least one output voltage to an application system. Furthermore, the energy converting module further includes at least one first power transmission port. When the energy converting module is separated from the electrical power storing module, the energy converting module is connected with the application system via the first power transmission port and provides a voltage to the application system. Thereby, the goals of charging and supplying power via solar power, and offering a power source that can be used anywhere are achieved.

Abstract: A cover member is adapted for use with a food processor, and includes a cover body formed with a straight rod passage and a food passage that branches from the rod passage. The rod passage has an open inner passage portion, and an open outer passage portion opposite to the inner passage portion in a vertical direction. The food passage has an open inlet end adjacent to the outer passage portion of the rod passage, an open outlet end in spatial communication with the inner passage portion of the rod passage, and a guide passage portion between the inlet and outlet ends. The guide passage portion is capable of guiding a food item fed into the food passage via the open inlet end to move into the inner passage portion of the rod passage via the open outlet end.