Abstract: A device comprises a high voltage N well and a high voltage P well over an N+ buried layer, a high voltage P-type implanted region in the high voltage N well, a first N+ region over the high voltage P-type implanted region and a P+ region and a second N+ region over the high voltage P well.

Abstract: A device comprises a high voltage N well and a high voltage P well over an N+ buried layer, a high voltage P-type implanted region in the high voltage N well, a first N+ region over the high voltage P-type implanted region and a P+ region and a second N+ region over the high voltage P well.

Abstract: An electrostatic discharge (ESD) protection structure comprises a high voltage P type implanted region disposed underneath an N+ region. The high voltage P type implanted region and the N+ region form a reverse diode or a Zener diode depending on different doping densities. The ESD protection structure further comprises a plurality of P+ and N+ regions. The high voltage P type implanted region and the P+ and N+ regions form a semiconductor device having a breakdown characteristic. In one embodiment, the semiconductor device may be a bipolar PNP transistor. The bipolar PNP transistor and a Zener diode in series connection form an ESD protection circuit. In another embodiment, the semiconductor device may be a Silicon-Controlled Rectifier (SCR), which is series-connected with a reverse diode. Both embodiments provide a reliable ESD protection.

Abstract: An electrostatic discharge (ESD) protection structure comprises a bipolar PNP transistor having an emitter formed by a first high voltage P type implanted region disposed underneath a first P+ region and a collector formed by a second high voltage P type implanted region disposed underneath a second P+ region. The ESD protection structure can have an adjustable threshold voltage by controlling the distance between the first high voltage P type implanted region and the second high voltage P type implanted region. Based upon a basic ESD protection structure, the ESD protection device can provide a reliable ESD protection for semiconductor devices having different voltage ratings.

Abstract: An electrostatic discharge (ESD) protection structure comprises a bipolar PNP transistor having an emitter formed by a first high voltage P type implanted region disposed underneath a first P+ region and a collector formed by a second high voltage P type implanted region disposed underneath a second P+ region. The ESD protection structure can have an adjustable threshold voltage by controlling the distance between the first high voltage P type implanted region and the second high voltage P type implanted region. Based upon a basic ESD protection structure, the ESD protection device can provide a reliable ESD protection for semiconductor devices having different voltage ratings.

Abstract: An electrostatic discharge (ESD) protection structure comprises a high voltage P type implanted region disposed underneath an N+ region. The high voltage P type implanted region and the N+ region form a reverse diode or a Zener diode depending on different doping densities. The ESD protection structure further comprises a plurality of P+ and N+ regions. The high voltage P type implanted region and the P+ and N+ regions form a semiconductor device having a breakdown characteristic. In one embodiment, the semiconductor device may be a bipolar PNP transistor. The bipolar PNP transistor and a Zener diode in series connection form an ESD protection circuit. In another embodiment, the semiconductor device may be a Silicon-Controlled Rectifier (SCR), which is series-connected with a reverse diode. Both embodiments provide a reliable ESD protection.

Abstract: An SCR device includes a substrate, a plurality of isolation structures defining a first region and a second region in the substrate, an n well disposed in the substrate, an n type first doped region disposed in the first region in the substrate, a p type second doped region disposed in the second region in the substrate, and a p type third doped region (PESD implant region) disposed underneath the first doped region in the first region in the substrate. The well is disposed underneath the first region and the second region, and the third doped region isolates the first doped region from the well.

Abstract: An ESD protection device including a substrate, a gate structure, a source region, a drain region and a first implanted region is provided. The gate structure includes a gate dielectric layer and a gate sequentially disposed on the substrate. The source region and the drain region are disposed in the substrate beside the gate structure. The first implanted region has the same conductivity type as the drain region. The first implanted region is disposed below the drain region, and the border thereof does not exceed the border of the drain region.

Abstract: A silicon controlled rectifier structure is provided in a substrate having a first conductive type. A well region formed within the substrate has a second conductive type. A first dopant region formed within the substrate and the well region has the first conductive type. A second dopant region formed within the substrate and a portion of the well region has the second conductive type. A third dopant region formed under the second dopant region has the first conductive type, in which the second and the third regions form a vertical Zener diode. A fourth dopant region formed within the substrate and separated from the second dopant region by a separation structure has the second conductive type. A fifth dopant region is formed within the substrate in a manner that the fourth dopant region is between the isolation structure and the fifth dopant region, and has the first conductive type.

Abstract: A silicon controlled rectifier structure is provided in a substrate having a first conductive type. A well region formed within the substrate has a second conductive type. A first dopant region formed within the substrate and the well region has the first conductive type. A second dopant region formed within the substrate and a portion of the well region has the second conductive type. A third dopant region formed under the second dopant region has the first conductive type, in which the second and the third regions form a vertical Zener diode. A fourth dopant region formed within the substrate and separated from the second dopant region by a separation structure has the second conductive type. A fifth dopant region is formed within the substrate in a manner that the fourth dopant region is between the isolation structure and the fifth dopant region, and has the first conductive type.

Abstract: A silicon controlled rectifier structure with the symmetrical layout is provided. The N-type doped regions and the P-type doped regions are disposed with the N-well and symmetrically arranged relative to the isolation structure in-between, while the P-type buried layer is located under the N-type doped regions and the P-type doped regions and fully isolates the N-type doped regions from the N-well.

Abstract: An SCR device includes a substrate, a plurality of isolation structures defining a first region and a second region in the substrate, an n well disposed in the substrate, an n type first doped region disposed in the first region in the substrate, a p type second doped region disposed in the second region in the substrate, and a p type third doped region (PESD implant region) disposed underneath the first doped region in the first region in the substrate. The well is disposed underneath the first region and the second region, and the third doped region isolates the first doped region from the well.