Abstract: A stacked semiconductor package formed on a substrate arranged in a serpentine configuration and a method for such fabrication are disclosed. The package is formed by at least one substrate section formed on the substrate bonded to at least one IC die by a flip-chip bonding method. The substrate is then folded onto itself such that the backside of a first IC die is adhesively bonded to the backside of a second IC die. A heat sink may optionally be utilized in-between the IC dies during the adhesive bonding process to further enhance thermal dissipation. The substrate section may be bonded to a printed circuit board by a plurality of solder balls formed on an active surface of the substrate section. The present invention can be bonded to a printed circuit board either in a horizontal position or in a vertical position for saving more real-estate on the board.

Abstract: A one-step bumping/bonding process for forming a semiconductor package is disclosed. In the method, a first electronic substrate which has either a plurality of conductive pads or a plurality of recessed openings formed on top of a plurality of apertures through the substrate is first provided and aligned with a second electronic substrate that has a plurality of conductive pads with each aperture aligned to a conductive pad on the second substrate. A plurality of solder balls is then planted on top of the plurality of conductive pads or the plurality of recessed openings on the surface of the first electronic substrate by a pick-and-place technique. Alternatively, a plurality of solder paste may be printed by a thick film stencil printing process similarly in place of the plurality of solder balls.

Abstract: The present invention discloses a method that applies one time of reflow after stacking a plurality of semiconductor elements to complete the packaging. The upper surface of the chip carrier substrate (opposite side to the chip) in a semiconductor packaging element is implanted with solder balls or coated with solder paste. After stacking a plurality of the semiconductor packaging elements together, a reflow is applied to achieve electrical and physical connections among substrates. If the semiconductor packaging elements are ultra-thin elements, then one only needs to implant solder balls or coat solder paste on the substrate top surface of the top semiconductor packaging element and the substrate bottom surface of the bottom semiconductor packaging element. The reflow will make the soldering material permeate through each layer of substrate, completing the electrical connection between substrates.

Abstract: The present invention discloses a method that applies one time of reflow after stacking a plurality of semiconductor elements to complete the packaging. The upper surface of the chip carrier substrate (opposite side to the chip) in a semiconductor packaging element is implanted with solder balls or coated with solder paste. After stacking a plurality of the semiconductor packaging elements together, a reflow is applied to achieve electrical and physical connections among substrates. If the semiconductor packaging elements are ultra-thin elements, then one only needs to implant solder balls or coat solder paste on the substrate top surface of the top semiconductor packaging element and the substrate bottom surface of the bottom semiconductor packaging element. The reflow will make the soldering material permeate through each layer of substrate, completing the electrical connection between substrates.

Abstract: A one-step bumping/bonding process for forming a semiconductor package is disclosed. In the method, a first electronic substrate which has either a plurality of conductive pads or a plurality of recessed openings formed on top of a plurality of apertures through the substrate is first provided and aligned with a second electronic substrate that has a plurality of conductive pads with each aperture aligned to a conductive pad on the second substrate. A plurality of solder balls is then planted on top of the plurality of conductive pads or the plurality of recessed openings on the surface of the first electronic substrate by a pick-and-place technique. Alternatively, a plurality of solder paste may be printed by a thick film stencil printing process similarly in place of the plurality of solder balls.

Abstract: A semiconductor flip chip chip-scale package that includes a metal heat slug bonded to the surface of a semiconductor chip. The heat slug protects the chip from being damaged as well as assists heat dissipation. Openings may also be formed on the heat slug to provide better air flow for cooling. A first packaging process for the chip-scale packages bonds a single heat slug to each semiconductor chip on a substrate panel. A second packaging process bonds a long heat slug comprising a plurality of connected heat slugs to the semiconductor substrate panel at the same time. Conventional packaging equipment can be used for both packaging processes to manufacture the chip-scale packages.

Abstract: A method for dispensing underfill in a flip chip package formed of an IC chip and a substrate and devices formed by such methods are disclosed. The method for dispensing may be carried out by either a screen printing (or stencil printing) or a dispensing head process wherein droplets of an underfill material may be dispensed on the surface of an IC die or a substrate. Numerous benefits may be achieved by the present invention for dispensing an underfill material which includes shorter cycle time, superior quality product and more flexible processing parameters. The underfill material may be cured in the same reflow furnace during the reflow process for the solder balls such that a separate curing process can be eliminated.

Abstract: The present invention includes a substrate having a die adhered thereon. The die and the substrate are interconnected by means of signal transferring means. Solder bumps are formed on the bottom side surface of the substrate. Molding compound is encapsulated among the substrate, the die and a heat spreader. A heat spreader is arranged over the top surface of the substrate. The heat spreader includes a plane having four supporting members that are set on the bottom side of the plane and at the corners of the plane. The supporting members are protruded from the plane to connect the heat spreaders and the substrate. The heat spreader further includes a protruded portion. A further supporting member is formed on the central portion of the protruded portion. The substrate has a die paddle formed thereon for receiving the die. A power ring is formed around the die paddle on the surface of the substrate for power input. A ground ring formed around the power ring on the substrate has ground pads.

Abstract: A method of assembly an integrated circuit die to a heat sink by first providing a lead frame that has a die-attach paddle portion having a top surface, a bottom surface, and an opening therethrough, positioning a heat sink having a raised portion on its top surface abutting the bottom surface of the die-attach paddle portion, and then frictionally engaging the heat sink and the die-attach paddle together and bonding an integrated circuit chip to the top surface of the heat sink with an adhesive material sandwiched therein between such that the assembly can be placed in a mold apparatus for forming a plastic encapsulated package.

Abstract: A method of bonding an integrated circuit die to a heat sink by first providing a lead frame that has a die paddle portion having a top surface, a bottom surface, and at least one aperture therethrough, positioning a heat sink abutting the bottom surface of the die paddle portion, and then pressing an integrated circuit die against the top surface of the die paddle portion with an adhesive material sandwiched therein between such that the adhesive flows through at least one aperture in the die paddle portion to bond the integrated circuit die and the heat sink together.

Abstract: The feature of the present invention is a heatspreader that is attached over a die instead of being set under the die to improve the efficient of spreading heat. A package includes a semiconductor die mounted to a die receiving area of a substrate. The die and a portion of the substrate are connected by using a conventional die attach material. A plurality of bonding wires are attached on the die. Further, conductive traces are on the top surface of the substrate. The die is electrically coupled to conductive traces by the bonding wires, a TAB method or a flip chip method. A plurality of conductive vias are also need for electrically coupling conductive traces on the top surface of the substrate to those on the bottom. Typically, at an end of portion of each conductive trace on the bottom of the substrate is an conductive pad for connecting to a solder ball. The die and portions of the substrate are encapsulated in a package body. A heatspreader is exactly set over the semiconductor die for spreading heat.

Abstract: A method of bonding an integrated circuit die to a heat sink by first providing a lead frame that has a die paddle portion having a top surface, a bottom surface, and at least one aperture therethrough, positioning a heat sink abutting the bottom surface of the die paddle portion, and then pressing an integrated circuit die against the top surface of the die paddle portion with an adhesive material sandwiched therein between such that the adhesive flows through at least one aperture in the die paddle portion to bond the integrated circuit die and the heat sink together.