Patents by Inventor Hsiu-Chen Chang

Hsiu-Chen Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160247797
    Abstract: A layout structure of HBTs comprising one or more HBTs, each of which comprises a base electrode, an emitter electrode, and a collector electrode. A passive layer, a first dielectric layer, a collector redistribution layers, one or more emitter copper pillars, and one or more collector copper pillars are formed above the one or more HBTs. The passive layer comprises a collector and an emitter pads. The first dielectric layer has one or more emitter and collector via holes. The emitter copper pillar is disposed on the emitter via hole and forms an electrical connection to the emitter electrode. The collector copper pillar is disposed on the collector redistribution layer and forms electrical connection to the collector electrode. The layout design of the emitter and collector copper pillars is therefore flexible, and the heat dissipation efficiency is improved.
    Type: Application
    Filed: April 29, 2016
    Publication date: August 25, 2016
    Inventors: Shu-Hsiao TSAI, Hsiu-Chen CHANG, Shinichiro TAKATANI, Cheng-Kuo LIN
  • Patent number: 9356127
    Abstract: A layout structure of HBTs comprising one or more HBTs, each of which comprises a base electrode, an emitter electrode, and a collector electrode. A passive layer, a first dielectric layer, a collector redistribution layers, one or more emitter copper pillars, and one or more collector copper pillars are formed above the one or more HBTs. The passive layer comprises a collector and an emitter pads. The first dielectric layer has one or more emitter and collector via holes. The emitter copper pillar is disposed on the emitter via hole and forms an electrical connection to the emitter electrode. The collector copper pillar is disposed on the collector redistribution layer and forms electrical connection to the collector electrode. The layout design of the emitter and collector copper pillars is therefore flexible, and the heat dissipation efficiency is improved.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: May 31, 2016
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Shu-Hsiao Tsai, Hsiu-Chen Chang, Shinichiro Takatani, Cheng-Kuo Lin
  • Publication number: 20140312390
    Abstract: A layout structure of HBTs comprising one or more HBTs, each of which comprises a base electrode, an emitter electrode, and a collector electrode. A passive layer, a first dielectric layer, a collector redistribution layers, one or more emitter copper pillars, and one or more collector copper pillars are formed above the one or more HBTs. The passive layer comprises a collector and an emitter pads. The first dielectric layer has one or more emitter and collector via holes. The emitter copper pillar is disposed on the emitter via hole and forms an electrical connection to the emitter electrode. The collector copper pillar is disposed on the collector redistribution layer and forms electrical connection to the collector electrode. The layout design of the emitter and collector copper pillars is therefore flexible, and the heat dissipation efficiency is improved.
    Type: Application
    Filed: June 7, 2013
    Publication date: October 23, 2014
    Inventors: Shu-Hsiao TSAI, Hsiu-Chen CHANG, Shinichiro TAKATANI, Cheng-Kuo LIN
  • Publication number: 20110050736
    Abstract: A pixel and an illuminating device thereof are provided. The pixel includes an organic light emitting diode (OLED), a transistor, a first switch, a second switch and a capacitor. One end of the OLED is electrically connected to a first voltage. A first source/drain of the transistor is electrically connected to a first potential point. The first switch is electrically connected between a second source/drain of the transistor and a second potential point, and is controlled by a first driving signal. The second switch is electrically connected between the second source/drain of the transistor and a gate of the transistor, and is controlled by a second driving signal. The capacitor is electrically connected between the gate of the transistor and a data line. The first driving signal and the second driving signal are used to alternately enable/disable the first and the second switches, so as to drive the pixel.
    Type: Application
    Filed: February 9, 2010
    Publication date: March 3, 2011
    Applicant: National Taiwan University of Science and Technology
    Inventors: Ching-Lin Fan, Yu-Sheng Lin, Bo-Sin Lin, Hsiu-Chen Chang, Yan-Wei Liu