Patents by Inventor Hsiu-Yi Lin

Hsiu-Yi Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113071
    Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 4, 2024
    Inventors: Chung-Shi Liu, Mao-Yen Chang, Yu-Chia Lai, Kuo-Lung Pan, Hao-Yi Tsai, Ching-Hua Hsieh, Hsiu-Jen Lin, Po-Yuan Teng, Cheng-Chieh Wu, Jen-Chun Liao
  • Patent number: 11942451
    Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mao-Yen Chang, Yu-Chia Lai, Cheng-Shiuan Wong, Ting Hao Kuo, Ching-Hua Hsieh, Hao-Yi Tsai, Kuo-Lung Pan, Hsiu-Jen Lin
  • Publication number: 20240096781
    Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.
    Type: Application
    Filed: March 20, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
  • Patent number: 11935878
    Abstract: A method for manufacturing a package structure includes providing a carrier board; providing at least one die having a top surface, a bottom surface, and a side surface on the carrier board; and forming a protective layer to cover at least a portion of the side surface of the die. The die includes a substrate, a semiconductor layer, a gate structure, a source structure and a drain structure, at least one dielectric layer, and at least one pad. The semiconductor layer is disposed on the substrate. The gate structure is disposed on the semiconductor layer. The source and the drain structures are disposed on opposite sides of the gate structure. The dielectric layer covers the gate, source, and drain structures. The pad is disposed on the dielectric layer and penetrates through the dielectric layer to electrically contact with the gate, source or drain structure.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: March 19, 2024
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsiu-Mei Yu, Guang-Yuan Jiang, Cheng-Yi Hsieh, Wei-Chan Chang, Chang-Sheng Lin
  • Patent number: 10805611
    Abstract: A method and apparatus for video encoding or decoding used by a video encoder or decoder respectively. In one method, input data associated with a video sequence are received. A current sequence header for a current picture is determined. Whether the current sequence header corresponds to a first sequence header or a second sequence header is determined. If the current sequence header corresponds to the second sequence header, one or more syntax values of a syntax set associated with the first sequence header are assigned to corresponding one or more syntax values of the syntax set associated with the current sequence header. The current picture is then encoded or decoded according to the current sequence header.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: October 13, 2020
    Assignee: MediaTek Inc.
    Inventors: Min-Hao Chiu, Hsiu-Yi Lin, Chia-yun Cheng, Chih-Ming Wang, Yung-Chang Chang
  • Publication number: 20180139464
    Abstract: Aspects of the disclosure provide a video decoding system. The video decoding system can include a decoder core configured to selectively decode independently decodable tiles in a picture, each tile including largest coding units (LCUs) each associated with a pair of picture-based (X, Y) coordinates or tile-based (X, Y) coordinates, and memory management circuitry configured to translate one or two coordinates of a current LCU to generate one or two translated coordinates, and to determine a target memory space storing reference data for decoding the current LCU based on the one or two translated coordinates.
    Type: Application
    Filed: November 3, 2017
    Publication date: May 17, 2018
    Applicant: MEDIATEK INC.
    Inventors: Min-Hao CHIU, Ping Chao, Chia-Hung Kao, Huei-Min Lin, Hsiu-Yi Lin, Chi-Hung Chen, Chia-Yun Cheng, Chih-Ming Wang, Yung-Chang Chang
  • Publication number: 20180109796
    Abstract: A method and apparatus for video encoding or decoding used by a video encoder or decoder respectively are disclosed. In one method, input data associated with a video sequence are received. A current sequence header for a current picture is determined. Whether the current sequence header corresponds to a first sequence header or a second sequence header is determined. If the current sequence header corresponds to the second sequence header, one or more syntax values of a syntax set associated with the first sequence header are assigned to corresponding one or more syntax values of the syntax set associated with the current sequence header. The current picture is then encoded or decoded according to the current sequence header.
    Type: Application
    Filed: October 13, 2017
    Publication date: April 19, 2018
    Inventors: Min-Hao CHIU, Hsiu-Yi LIN, Chia-yun CHENG, Chih-Ming WANG, Yung-Chang CHANG
  • Publication number: 20170188033
    Abstract: A method and apparatus of reusing reference data for video decoding are disclosed. Motion information associated with motion vectors for coded blocks processed after the current block are derived without storing decoded residuals associated with the coded blocks. Reuse information regarding reference data required for Inter prediction or Intra block copy of the coded blocks is determined based on the motion information. If the current block is coded in the Inter prediction mode or the Intra block copy mode, whether required reference data for the current block are in an internal memory is determined and the reference data are fetched from an external memory to the internal memory if the required reference data are not stored in the internal memory. The reference data in the internal memory is managed according to the reuse information to reduce data transferring between the external memory and the internal memory.
    Type: Application
    Filed: December 21, 2016
    Publication date: June 29, 2017
    Inventors: Hsiu-Yi LIN, Ping CHAO, Ming-Long WU, Chia-Yun CHENG, Chih-Ming WANG, Yung-Chang CHANG
  • Publication number: 20090019782
    Abstract: An abrasive tool having a spray-formed brazing filler layer and a manufacturing process thereof are described, in which drawing and adhering steps performed on a conventional brazing filler layer are simplified through spraying. A solvent, an adhesive, and a powder are sequentially mixed to form a brazing filler slurry; next, the brazing filler is sprayed on a substrate, so as to form a brazing filler layer with an appropriate thickness; and then, abrasive particles are adhered to the brazing filler layer, and then the abrasive particles are combined with the substrate through the brazing filler layer by brazing. The conventional drawing and adhering steps are omitted through spraying, and it is applicable for substrates with complicated shapes.
    Type: Application
    Filed: July 14, 2008
    Publication date: January 22, 2009
    Applicant: KINIK COMPANY
    Inventors: Yu-Tai Chen, Chou-Chih Tseng, Hsiu-Yi Lin
  • Patent number: 7467989
    Abstract: A ceramic polishing pad dresser and the method for fabricating the same are provided. Abrasive particles are adhered onto a ceramic substrate by heating a ceramic powder to be vitrified, thus forming a ceramic diamond disk. Meanwhile, a plastic base is mounted on the bottom of the ceramic diamond disk. As for heating the ceramic powder to be vitrified, the ceramic powder with low melting point is disposed on the ceramic substrate, and to be heated to form a vitrified adhering layer, so as to adhere the abrasive particles disposed thereon to the ceramic substrate. The plastic base mounted on the bottom of the ceramic diamond disk is provided for bearing the ceramic diamond disk and has corresponding screw holes and positioning holes formed thereon for fitting the chemical mechanical polishing table to be mounted and reducing the manufacturing cost.
    Type: Grant
    Filed: August 23, 2006
    Date of Patent: December 23, 2008
    Assignee: Kinik Company
    Inventors: Hsiu-Yi Lin, Chou-Chih Tseng, Yu-Tai Chen, Wei Huang
  • Publication number: 20070049185
    Abstract: A ceramic polishing pad dresser and the method for fabricating the same are provided. Abrasive particles are adhered onto a ceramic substrate by heating a ceramic powder to be vitrified, thus forming a ceramic diamond disk. Meanwhile, a plastic base is mounted on the bottom of the ceramic diamond disk. As for heating the ceramic powder to be vitrified, the ceramic powder with low melting point is disposed on the ceramic substrate, and to be heated to form a vitrified adhering layer, so as to adhere the abrasive particles disposed thereon to the ceramic substrate. The plastic base mounted on the bottom of the ceramic diamond disk is provided for bearing the ceramic diamond disk and has corresponding screw holes and positioning holes formed thereon for fitting the chemical mechanical polishing table to be mounted and reducing the manufacturing cost.
    Type: Application
    Filed: August 23, 2006
    Publication date: March 1, 2007
    Applicant: KINIK COMPANY
    Inventors: Hsiu-Yi Lin, Chou-Chih Tseng, Yu-Tai Chen, Wei Huang