Abstract: A structure and method are provided for protecting a substrate of an active area adjacent to an isolation region. A substrate including an isolation region is provided, wherein a gate is disposed on the substrate adjacent to the isolation region. A sacrificial protective layer is deposited on the substrate and then etched back to form a sidewall protective layer on the sidewall of the gate, covering a portion of isolation region to protect the substrate adjoining the gate and the isolation region.

Abstract: A method of forming a polysilicon spacer with a vertical profile. A dielectric layer and a sacrificial layer are successively deposited to cover the entire surface of a polysilicon layer that covers an insulating structure. Then, CMP is used to remove parts of the sacrificial layer, the dielectric layer and the polysilicon layer to reach a planarized surface. Then, a part of the polysilicon layer outside the insulating structure is removed to make the insulating structures protrude from the top of the polysilicon layer. After removing the sacrificial layer, forming a second oxide layer on the exposed surface of the polysilicon layer and removing the dielectric layer, dry etching is used to remove the polysilicon layer that is not covered by the second oxide layer. The polysilicon layer left under the second oxide layer serves as a polysilicon spacer with a vertical profile.

Abstract: A method for forming self-rounded shallow trench isolation is described. A pad oxide layer is provided over the surface of a semiconductor substrate. A nitride layer is then deposited overlying the pad oxide layer. Isolation trenches are then etched through the nitride and pad oxide layers into the semiconductor substrate. A layer of oxide is then deposited over the said nitride layer and within the isolation trenches. The oxide layer is then polished away through chemical and mechanical polishing wherein the substrate is planarized. The nitride layer is then etched away using a special dry-etch recipe that has a higher etching rate for silicon nitride than oxide. The dry-etch recipe also has a very low etching rate for the silicon substrate. This results in the removal of the nitride layer, rounding the shoulders of the trench and leaving the substrate unaffected. The fabrication of the integrated circuit device is completed.

Abstract: A stacked layer including a first oxide, a nitride layer, a second oxide layer and an oxynitride layer is formed on the top of the first oxide layer. An etching is performed through a photoresist to etch the oxynitride, the second oxide and nitride. Oxide spacers are formed on the side walls of the pattern structure, the oxynitride layer is also removed during the formation of the oxide spacers. Trenches are generated by a dry etching technique. The second oxide and the oxide spacers are removed. Next, a thermal oxidation is performed to rounding the corners of the trench openings. A gap filling material is refilled into the trenches and formed on the nitride. Next, a chemical mechanical polishing (CMP) is used to remove the top of the CVD-oxide and the nitride layer. The residual nitride layer, the CVD-oxide and pad oxide are removed to create trench isolation structures with rounding corners.

Abstract: The present invention is a method of manufacturing crown shape capacitors for use in DRAM semiconductor memory. The method includes the steps of forming a first polysilicon layer, patterning a photoresist on the first polysilicon layer, etching the first polysilicon layer, using oxygen plasma to strip the photoresist, forming a side wall polymer onto the side walls of the first polysilicon layer, using the side wall polymer as a mask to etch back the first polysilicon layer to form a crown shape structure, removing the side wall polymer, depositing a dielectric layer onto the first polysilicon layer, and depositing a second polysilicon layer onto the dielectric layer.

Abstract: A method for forming a patterned layer within an integrated circuit. There is first provided a substrate having formed thereover a blanket target layer. There is then formed upon the blanket target layer a blanket focusing layer formed from an organic anti-reflective coating (ARC) material, where the blanket focusing layer is susceptible to a reproducible negative etch bias within a first etch method employed in forming from the blanket focusing layer a patterned focusing layer. The first etch method is a first plasma etch method employing a reactant gas composition comprising trifluoromethane, carbon tetrafluoride, oxygen and argon. There is then formed upon the blanket focusing layer a blanket photoresist layer which is photoexposed and developed to form a patterned photoresist layer.

Abstract: The invention provides a method of forming field oxide regions between active regions in a semiconductor substrate. The invention forms nitride feet on the sidewalls of a nitride oxidation mask to prevent formation of the bird's beak on the field oxide and reduce stress in the active areas. The invention begins by forming a first oxide layer and a masking block, over the active regions. A second nitride layer is deposited over the masking block and the substrate surface. The second nitride layer is anisotropically etched with a customized etch forming nitride spacers on the sidewalls of the masking block, and nitride spacer feet on the surface of the first oxide layer. The customized etch of the invention optimizes the microloading effects to properly form the nitride feet. The substrate is oxidized, using the masking block nitride spacers and the nitride spacer feet as an oxidation mask to form field oxide regions. The nitride feet eliminate bird's beak problem.