Abstract: A multi-channel display driver circuit incorporating modified D/A converters has a plurality of digital comparators connected to a number generator. Each digital comparator has an output, a digital data input and a reference input. The reference inputs of all digital comparators are connected to the number generator and the outputs are respectively connected to corresponding data channels of a display. By the proposed technique, each digital comparator obtains a unique non-sequence reference signal, and then compares it with the input digital data signal. Since the non-sequential signals are input to the reference input of the digital comparator, the overshoot distortion, the harmonic distortion and the electromagnetic interference problems are prevented. Therefore, the precise imaging can be obtained with this signal modulation technique in small circuit size.

Abstract: A GAMMA adjustment method for a multi-channel driver of a monitor and device thereof are provided. The GAMMA adjustment method converts an m-bit input signal of a high bit signal corresponding to an m-bit simulated GAMMA curve into an n-bit signal of a low bit signal. Then the n-bit signal together with an n-bit input signal are input to a driver component. The driver component compares the two low-bit signals to generate a PWM driver signal supplied to a data channel of the monitor. Since the two n-bit signals of the driver component are of low quantity bit, the driver chooses n-bit digital driver components to greatly reduce an overall layout area of the driver and further to reduce manufacture cost.

Abstract: An auto-range current mirror circuit has a current sensing circuit, a front and rear stage current mirrors each has an adjustable amplifying rate. The current sensing circuit presets a threshold current and has an input current of the front stage current mirror. The current sensing current compares the input current with a threshold current and then outputs a controlling signal to the front and rear stage current mirrors to adjust a suitable amplifying rate. Therefore, a bias current of the rear stage current mirror is amplified by the suitable amplifying rate to improve the quality of output current of the rear stage current mirror.

Abstract: An auto-range current mirror circuit has a current sensing circuit, a front and rear stage current mirrors each has an adjustable amplifying rate. The current sensing circuit presets a threshold current and has an input current of the front stage current mirror. The current sensing current compares the input current with a threshold current and then outputs a controlling signal to the front and rear stage current mirrors to adjust a suitable amplifying rate. Therefore, a bias current of the rear stage current mirror is amplified by the suitable amplifying rate to improve the quality of output current of the rear stage current mirror.

Abstract: A GAMMA adjustment method for a multi-channel driver of a monitor and device thereof are provided. The GAMMA adjustment method converts an m-bit input signal of a high bit signal corresponding to an m-bit simulated GAMMA curve into an n-bit signal of a low bit signal. Then the n-bit signal together with an n-bit input signal are input to a driver component. The driver component compares the two low-bit signals to generate a PWM driver signal supplied to a data channel of the monitor. Since the two n-bit signals of the driver component are of low quantity bit, the driver chooses n-bit digital driver components to greatly reduce an overall layout area of the driver and further to reduce manufacture cost.

Abstract: A multi-channel display driver circuit incorporating modified D/A converters has a plurality of digital comparators connected to a number generator. Each digital comparator has an output, a digital data input and a reference input. The reference inputs of all digital comparators are connected to the number generator and the outputs are respectively connected to corresponding data channels of a display. By the proposed technique, each digital comparator obtains a unique non-sequence reference signal, and then compares it with the input digital data signal. Since the non-sequential signals are input to the reference input of the digital comparator, the overshoot distortion, the harmonic distortion and the electromagnetic interference problems are prevented. Therefore, the precise imaging can be obtained with this signal modulation technique in small circuit size.

Abstract: An over-voltage protection coil control circuit has at least one coil driving circuit, wherein an over-voltage protection circuit is connected to the at least one coil driver circuit. The at least one coil driver circuit consists of a transistor. The over-voltage protection circuit is composed of a Zener diode connected to a power supply and the at least one coil driver circuit. When the coil generates a high inverse emf (electromotive force) due to the inversion of its polarity, the Zener diode conducts and guides the high voltage inverse emf to the power supply.

Abstract: A motor speed control having synchronous PWM signals has a synchronous phase detecting unit and a PWM control unit. The synchronous phase detecting unit detects the phase variation of a Hall signal, which represents the phase change of the motor, and outputs a digital value to the PWM control unit. The PWM control unit compares the digital value with a speed control command so as to obtain a PWM signal, wherein the PWM signal is synchronized with the Hall signal. Since the PWM signal is synchronized with the Hall signal, the motor is operated smoothly even in the low speed rotation, and audible noises are effectively reduced.

Abstract: A motor speed control having synchronous PWM signals has a synchronous phase detecting unit and a PWM control unit. The synchronous phase detecting unit detects the phase variation of a Hall signal, which represents the phase change of the motor, and outputs a digital value to the PWM control unit. The PWM control unit compares the digital value with a speed control command so as to obtain a PWM signal, wherein the PWM signal is synchronized with the Hall signal. Since the PWM signal is synchronized with the Hall signal, the motor is operated smoothly even in the low speed rotation, and audible noises are effectively reduced.

Abstract: An image sensor includes a plurality of pixels, each of which has a photo storage cell, a sample-and-hold switch connected with one terminal of the photo storage cell, and a reset switch connected with the other terminal of the photo storage cell. Each of the pixels of the image sensor senses light and generates charge and stores the induced charge corresponding to the generated charge by controlling the switches, so as to achieve an electronic shutter function.

Abstract: A power polarity reversal protecting circuit for an integrated circuit includes a protecting transistor, PMOS components and NMOS components, wherein the protecting transistor is a protecting PMOS transistor or a protecting NMOS transistor. If the protecting transistor is the PMOS transistor, a gate and a source of the protecting PMOS transistor are respectively connected to ground and power. A drain and a substrate of the protecting PMOS transistor is connected to a substrate of the PMOS component. If the protecting transistor is the protecting NMOS transistor, a gate and a source of the protecting NMOS transistor are respectively connected to power and ground. A drain and a substrate of the protecting NMOS transistor is connected to a substrate of the NMOS component. When the power polarity is in reversal connection, the protecting transistors are terminated to prevent damage from the power polarity reversal connection.

Abstract: A power polarity reversal protecting circuit for an integrated circuit includes a protecting transistor, PMOS components and NMOS components, wherein the protecting transistor is a protecting PMOS transistor or a protecting NMOS transistor. If the protections transistor is the PMOS transistor, a gate and a source of the protecting PMOS transistor are respectively connected to ground and power. A drain and a substrate of the protecting PMOS transistor is connected to a substrate of the PMOS component. If the protecting transistor is the protecting NMOS transistor, a gate and a source of the protecting NMOS transistor are respectively connected to power and ground. A drain and a substrate of the protecting NMOS transistor is connected to a substrate of the NMOS component. When the power polarity is in reversal connection, the protecting transistors are terminated to prevent damage from the power polarity reversal connection.