Patents by Inventor Hsuan Chang
Hsuan Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11984901Abstract: A counter signal counting at a frequency of a clock signal is generated. Among a plurality of different numeric ranges corresponding to a plurality of different thresholds, a threshold corresponding to a numeric range containing a frequency ratio is selected. In response to the counter signal reaching the selected threshold, a logic level of an output signal is switched.Type: GrantFiled: May 31, 2022Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Mao-Hsuan Chou, Chih-Hsien Chang, Ruey-Bin Sheen
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Publication number: 20240153887Abstract: A semiconductor package structure includes a base having a first surface and a second surface opposite thereto, wherein the base comprises a wiring structure, a first electronic component disposed over the first surface of the base and electrically coupled to the wiring structure, a second electronic component disposed over the first surface of the base and electrically coupled to the wiring structure, wherein the first electronic component and the second electronic component are separated by a molding material, a first hole and a second hole formed on the second surface of the base, and a frame disposed over the first surface of the base, wherein the frame surrounds the first electronic component and the second electronic component.Type: ApplicationFiled: January 4, 2024Publication date: May 9, 2024Inventors: Tzu-Hung LIN, Chia-Cheng CHANG, I-Hsuan PENG, Nai-Wei LIU
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Publication number: 20240145389Abstract: A semiconductor chip includes a first intellectual property block. There are a second intellectual property block and a third intellectual property block around the first intellectual property block. There is a multiple metal layer stack over the first intellectual property block, the second intellectual property block, and the third intellectual property block. An interconnect structure is situated in the upper portion of the multiple metal layer stack. The interconnect structure is configured for connecting the first intellectual property block and the second intellectual property block. In addition, at least a part of the interconnect structure extends across and over the third intellectual property block.Type: ApplicationFiled: July 28, 2023Publication date: May 2, 2024Inventors: Li-Chiu WENG, Yew Teck TIEO, Ming-Hsuan WANG, Chia-Cheng CHEN, Wei-Yi CHANG, Jen-Hang YANG, Chien-Hsiung HSU
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Patent number: 11973260Abstract: A light-transmitting antenna includes a substrate, a first and a second conductive pattern. The first and the second conductive pattern is disposed on a first and a second surface of the substrate respectively. The first conductive pattern includes a first feeder unit, a first and a second radiation unit, a first and a second coupling unit and a first parasitic unit. The first feeder unit is connected to the second radiation unit. The first and the second radiation unit are located between the first and the second coupling unit. One side and the other side of the first parasitic unit is connected to the second coupling unit and adjacent to the first coupling unit respectively. The second conductive pattern includes a second feeder unit, a third coupling unit, a second parasitic unit, and a fourth coupling unit.Type: GrantFiled: November 9, 2022Date of Patent: April 30, 2024Assignee: Industrial Technology Research InstituteInventors: Ruo-Lan Chang, Mei-Ju Lee, Cheng-Hua Tsai, Meng-Hsuan Chen, Wei-Chung Chen
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Publication number: 20240137875Abstract: A method for adjusting time-averaged (TA) parameters of a transmitting (TX) power of a radio module includes: obtaining at least one message of the at least one other radio module or at least one message of the radio module; determining a scenario of the TX power of the radio module according to the at least one message of the at least one other radio module or the at least one message of the radio module; determining whether the scenario is different from a predetermined scenario of the TX power of the radio module; and in response to the scenario being different from the predetermined scenario, adjusting the TA parameters according to the scenario.Type: ApplicationFiled: October 1, 2023Publication date: April 25, 2024Applicant: MEDIATEK INC.Inventors: Yi-Ying Huang, Yi-Hsuan Lin, Han-Chun Chang
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Publication number: 20240137061Abstract: A radio frequency receiving circuit includes a first amplification circuit, an oscillation circuit, a frequency mixing and amplification circuit and a dividing circuit. The first amplification circuit is configured to amplify an input signal so as to generate an amplified input signal. The oscillation circuit is configured to provide a local oscillation signal. The frequency mixing and amplification circuit is configured to mix and amplify the amplified input signal according to the local oscillation signal. The dividing circuit is configured to form a dividing loop at a preset frequency for the amplified input signal according to the local oscillation signal when the dividing circuit is driven. A chip including the radio frequency receiving circuit and a main circuit is also provided. The main circuit is configured to drive the dividing circuit when the second input signal is determined to include a signal of the preset frequency.Type: ApplicationFiled: October 17, 2023Publication date: April 25, 2024Applicant: REALTEK SEMICONDUCTOR CORP.Inventors: Ruo-Hsuan GAO, Chia-Yi LEE, Chia-Jun CHANG
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Publication number: 20240136227Abstract: A method includes etching a dielectric layer of a substrate to form an opening in the dielectric layer, forming a metal layer extending into the opening, performing an anneal process, so that a bottom portion of the metal layer reacts with a semiconductor region underlying the metal layer to form a source/drain region, performing a plasma treatment process on the substrate using a process gas including hydrogen gas and a nitrogen-containing gas to form a silicon-and-nitrogen-containing layer, and depositing a metallic material on the silicon-and-nitrogen-containing layer.Type: ApplicationFiled: January 3, 2024Publication date: April 25, 2024Inventors: Ching-Yi Chen, Sheng-Hsuan Lin, Wei-Yip Loh, Hung-Hsu Chen, Chih-Wei Chang
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Publication number: 20240137165Abstract: A computing device includes: a storage circuit, for storing an arbitration interframe space (AIFS) time, at least one expected value of at least one backoff time, a preamble time, a short interframe space (SIFS) time and an acknowledgement (ACK) time; a first computing circuit, for computing a payload time according to a packet length and a packet rate; a second computing circuit, coupled to the storage circuit and the first computing circuit, for computing at least one packet transmission time according to the AIFS time, the at least one expected value of the at least one backoff time, the preamble time, the SIFS time, the ACK time and the payload time; and a third computing circuit, coupled to the second computing circuit, for computing a total packet transmission time according to the at least one packet transmission time and an estimated packet error rate.Type: ApplicationFiled: September 26, 2023Publication date: April 25, 2024Applicant: Realtek Semiconductor Corp.Inventors: Chien-Hsun Liao, Wei-Hsuan Chang
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Publication number: 20240138113Abstract: The present disclosure provides a cooling system, including an air-cooling device and a water-cooling device. The air-cooling device includes a first fan, an evaporator, a first condenser, and a second fan. The first fan is arranged in a first cooling room and configured to blow a hot air inside a rack into a first cooling room. The evaporator is arranged in the first cooling room. The first condenser is arranged in a second cooling room. The second fan is arranged in the second cooling room and configured to blow an outside air into the second cooling room. The water-cooling device includes a radiator. The radiator is arranged in the second cooling room and configured to receive a hot liquid from an electronic device in the rack through a third pipeline and transmit a cold liquid to the electronic device through a fourth pipeline.Type: ApplicationFiled: February 10, 2023Publication date: April 25, 2024Inventors: Ren-Chun CHANG, Shao-Hsuan LAI, Siang-Lin YOU
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Publication number: 20240120203Abstract: A method includes forming a dummy gate over a semiconductor fin; forming a source/drain epitaxial structure over the semiconductor fin and adjacent to the dummy gate; depositing an interlayer dielectric (ILD) layer to cover the source/drain epitaxial structure; replacing the dummy gate with a gate structure; forming a dielectric structure to cut the gate structure, wherein a portion of the dielectric structure is embedded in the ILD layer; recessing the portion of the dielectric structure embedded in the ILD layer; after recessing the portion of the dielectric structure, removing a portion of the ILD layer over the source/drain epitaxial structure; and forming a source/drain contact in the ILD layer and in contact with the portion of the dielectric structure.Type: ApplicationFiled: March 8, 2023Publication date: April 11, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Te-Chih HSIUNG, Yun-Hua CHEN, Bing-Sian WU, Yi-Hsuan CHIU, Yu-Wei CHANG, Wen-Kuo HSIEH, Chih-Yuan TING, Huan-Just LIN
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Publication number: 20240120656Abstract: A light-transmitting antenna includes a substrate, a first conductive pattern, and a second conductive pattern. The first conductive pattern has a first feeder unit, a first radiation unit, a second radiation unit, and a first connection unit. The first feeder unit and the first connection unit are connected to two sides of the first radiation unit. The first connection unit connects the first radiation unit and the second radiation unit. The second conductive pattern has a second feeder unit, a third radiation unit, a fourth radiation unit, and a second connection unit. The second feeder unit and the second connection unit are connected to two sides of the third radiation unit. The second connection unit connects the third radiation unit and the fourth radiation unit. An orthogonal projection of the second feeder unit on a first surface of the substrate at least partially overlaps the first feeder unit.Type: ApplicationFiled: December 22, 2022Publication date: April 11, 2024Applicant: Industrial Technology Research InstituteInventors: Meng-Hsuan Chen, Cheng-Hua Tsai, Mei-Ju Lee, Ruo-Lan Chang, Wei-Chung Chen
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Publication number: 20240121685Abstract: A method of reducing gray energy consumption and achieving optimal gray energy saving for carbon neutralization is proposed. In a cellular network, each cell or BS (group of cells) has renewable (green) and non-renewable (gray, on-grid power) energy sources. The renewable (green) energy is highly variable and unpredictable, while non-renewable (gray, on-grid power) is stable but is not renewable and thus has more carbon impact. Each cell or BS (group of cells) services is associated UEs when it is on. In one novel aspect, a cell or BS (group of cells) that consumes more non-renewable energy can give some or all of its served UEs to another cell or BS (group of cells) that consumes less non-renewable energy.Type: ApplicationFiled: September 21, 2023Publication date: April 11, 2024Inventors: Chien-Sheng Yang, I-Kang Fu, YUAN-CHIEH LIN, Chia-Lin Lai, Yu-Hsin Lin, Yun-Hsuan Chang
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Publication number: 20240120338Abstract: A semiconductor device structure is provided. The semiconductor device has a first dielectric wall between an n-type source/drain region and a p-type source/drain region to physically and electrically isolate the n-type source/drain region and the p-type source/drain region from each other. A second dielectric wall is formed between a first channel region connected to the n-type source/drain region and a second channel region connected to the p-type source/drain region. A contact is formed to physically and electrically connect the n-type source/drain region with the p-type source/drain region, wherein the contact extends over the first dielectric wall. The first electric wall has a gradually decreasing width W5 towards a tip of the dielectric wall from a top contact position between the first dielectric wall and either the n-type source/drain region or the p-type source/drain region.Type: ApplicationFiled: February 15, 2023Publication date: April 11, 2024Inventors: Ta-Chun LIN, Ming-Che CHEN, Yu-Hsuan LU, Chih-Hao CHANG
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Publication number: 20240121642Abstract: Techniques and examples of determination of receiver (RX) beam for radio link monitoring (RLM) based on available spatial quasi-co-location (QCL) information in New Radio (NR) mobile communications are described. An apparatus receives downlink (DL) signaling from a network. The apparatus determines whether to extend an evaluation period of RLM based on a quasi-co-location (QCL) association provided in at least the DL signaling. The apparatus then executes extension of the evaluation period of the RLM, or not, based on a result of the determining.Type: ApplicationFiled: December 19, 2023Publication date: April 11, 2024Inventors: Hsuan-Li Lin, Kuhn-Chang Lin, Tsang-Wei Yu
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Patent number: 11950902Abstract: The present invention provides a micro biosensor for reducing a measurement interference when measuring a target analyte in the biofluid, including: a substrate; a first working electrode configured on the surface, and including a first sensing section; a second working electrode configured on the surface, and including a second sensing section which is configured adjacent to at least one side of the first sensing section; and a chemical reagent covered on at least a portion of the first sensing section for reacting with the target analyte to produce a resultant. When the first working electrode is driven by a first working voltage, the first sensing section measures a physiological signal with respect to the target analyte. When the second working electrode is driven by a second working voltage, the second conductive material can directly consume the interferant so as to continuously reduce the measurement inference of the physiological signal.Type: GrantFiled: July 31, 2020Date of Patent: April 9, 2024Assignee: Bionime CorporationInventors: Chun-Mu Huang, Chieh-Hsing Chen, Heng-Chia Chang, Chi-Hao Chen, Pi-Hsuan Chen
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Patent number: 11947737Abstract: An optical navigation device control method comprising: (a) computing brightness contrast information of original images captured by an image sensor of an optical navigation device; (b) computing brightness variation levels of the original images; (c) improving image qualities of the original images based on the brightness contrast information and the brightness variation levels, to generate adjusted images; and (d) computing movements of the optical navigation device based on displacement between the adjusted images. The optical navigation device is located on a surface. The step (d) comprises: collecting reference images of different parts of the surface for a plurality of combinations of moving directions of the optical navigation device and placement directions of the surface; and determining a type of the surface via comparing images of a current surface with the reference images.Type: GrantFiled: May 4, 2023Date of Patent: April 2, 2024Assignee: PixArt Imaging Inc.Inventors: Bo-Yi Chang, Yao-Hsuan Lin
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Patent number: 11948895Abstract: A semiconductor package structure includes a substrate having a wiring structure. A first semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure. A second semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged side-by-side. Holes are formed on a surface of the substrate, wherein the holes are located within a projection of the first semiconductor die or the second semiconductor die on the substrate. Further, a molding material surrounds the first semiconductor die and the second semiconductor die, and surfaces of the first semiconductor die and the second semiconductor die facing away from the substrate are exposed by the molding material.Type: GrantFiled: July 4, 2022Date of Patent: April 2, 2024Assignee: MEDIATEK INC.Inventors: Tzu-Hung Lin, Chia-Cheng Chang, I-Hsuan Peng, Nai-Wei Liu
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Publication number: 20240105629Abstract: A semiconductor package includes a first semiconductor die, a second semiconductor die, a semiconductor bridge, an integrated passive device, a first redistribution layer, and connective terminals. The second semiconductor die is disposed beside the first semiconductor die. The semiconductor bridge electrically connects the first semiconductor die with the second semiconductor die. The integrated passive device is electrically connected to the first semiconductor die. The first redistribution layer is disposed over the semiconductor bridge. The connective terminals are disposed on the first redistribution layer, on an opposite side with respect to the semiconductor bridge. The first redistribution layer is interposed between the integrated passive device and the connective terminals.Type: ApplicationFiled: November 30, 2023Publication date: March 28, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hsuan Tsai, Chin-Chuan Chang, Szu-Wei Lu, Tsung-Fu Tsai
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Publication number: 20240106114Abstract: A radio device includes a first antenna array and an actuator. The first antenna array is configured to transmit a radiation beam to a remote device. The actuator is configured to change an orientation of the first antenna array, whereby a beam direction of the radiation beam is changed according to a change of the orientation of the first antenna array. The beam direction of the radiation beam is adjusted according to a beam steering mechanism performed by the first antenna array.Type: ApplicationFiled: September 26, 2022Publication date: March 28, 2024Inventors: Shih-Wei HSIEH, Wei-Hsuan CHANG, Chih-Wei LEE, Shyh-Tirng FANG
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Patent number: 11935981Abstract: A photo-detecting device includes a first semiconductor layer with a first dopant, a light-absorbing layer, a second semiconductor layer, and a semiconductor contact layer. The second semiconductor layer is located on the first semiconductor layer and has a first region and a second region, the light absorbing layer is located between the first semiconductor layer and the second semiconductor layer and has a third region and a fourth region, the semiconductor contact layer contacts the first region. The first region includes a second dopant and a third dopant, the second region includes second dopant, and the third region includes third dopant. The semiconductor contact layer has a first thickness greater than 50 ? and smaller than 1000 ?.Type: GrantFiled: June 30, 2021Date of Patent: March 19, 2024Assignee: EPISTAR CORPORATIONInventors: Chu-Jih Su, Chia-Hsiang Chou, Wei-Chih Peng, Wen-Luh Liao, Chao-Shun Huang, Hsuan-Le Lin, Shih-Chang Lee, Mei Chun Liu, Chen Ou